reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
 6841   const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
 6843     ((AMDGPUOperand &)*Operands[I++]).addRegOperands(Inst, 1);
 6856           ((SkipDstVcc && Inst.getNumOperands() == 1) ||
 6857            (SkipSrcVcc && Inst.getNumOperands() == 5))) {
 6861                  Inst.getNumOperands() == 0) {
 6866     if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) {
 6867       Op.addRegOrImmWithInputModsOperands(Inst, 2);
 6877   if (Inst.getOpcode() != AMDGPU::V_NOP_sdwa_gfx10 &&
 6878       Inst.getOpcode() != AMDGPU::V_NOP_sdwa_gfx9 &&
 6879       Inst.getOpcode() != AMDGPU::V_NOP_sdwa_vi) {
 6883       addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyClampSI, 0);
 6884       if (AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::omod) != -1) {
 6885         addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOModSI, 0);
 6887       addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySdwaDstSel, SdwaSel::DWORD);
 6888       addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySdwaDstUnused, DstUnused::UNUSED_PRESERVE);
 6889       addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySdwaSrc0Sel, SdwaSel::DWORD);
 6893       addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyClampSI, 0);
 6894       if (AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::omod) != -1) {
 6895         addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOModSI, 0);
 6897       addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySdwaDstSel, SdwaSel::DWORD);
 6898       addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySdwaDstUnused, DstUnused::UNUSED_PRESERVE);
 6899       addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySdwaSrc0Sel, SdwaSel::DWORD);
 6900       addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySdwaSrc1Sel, SdwaSel::DWORD);
 6904       if (AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::clamp) != -1)
 6905         addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyClampSI, 0);
 6906       addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySdwaSrc0Sel, SdwaSel::DWORD);
 6907       addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySdwaSrc1Sel, SdwaSel::DWORD);
 6917   if (Inst.getOpcode() == AMDGPU::V_MAC_F32_sdwa_vi ||
 6918       Inst.getOpcode() == AMDGPU::V_MAC_F16_sdwa_vi)  {
 6919     auto it = Inst.begin();
 6921       it, AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::src2));
 6922     Inst.insert(it, Inst.getOperand(0)); // src2 = dst
 6922     Inst.insert(it, Inst.getOperand(0)); // src2 = dst