reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1549 AsmParser->hasInv2PiInlineImm()); 1559 AsmParser->hasInv2PiInlineImm()); 1565 AsmParser->hasInv2PiInlineImm()); 1571 AsmParser->hasInv2PiInlineImm()); 1581 AsmParser->hasInv2PiInlineImm()); 1586 AsmParser->hasInv2PiInlineImm()); 1637 return isRegKind() && AsmParser->getMRI()->getRegClass(RCID).contains(getReg()); 1641 if (AsmParser->isVI()) 1643 else if (AsmParser->isGFX9() || AsmParser->isGFX10()) 1643 else if (AsmParser->isGFX9() || AsmParser->isGFX10()) 1666 return (AsmParser->getFeatureBits()[AMDGPU::FeatureWavefrontSize64] && isSCSrcB64()) || 1667 (AsmParser->getFeatureBits()[AMDGPU::FeatureWavefrontSize32] && isSCSrcB32()); 1688 if (AMDGPU::isSISrcOperand(AsmParser->getMII()->get(Inst.getOpcode()), 1700 const auto& InstDesc = AsmParser->getMII()->get(Inst.getOpcode()); 1721 AsmParser->hasInv2PiInlineImm())) { 1730 const_cast<AMDGPUAsmParser *>(AsmParser)->Warning(Inst.getLoc(), 1794 AsmParser->hasInv2PiInlineImm())) { 1806 if (AMDGPU::isInlinableLiteral64(Val, AsmParser->hasInv2PiInlineImm())) { 1822 AsmParser->hasInv2PiInlineImm())) { 1836 AsmParser->hasInv2PiInlineImm())); 1864 Inst.addOperand(MCOperand::createReg(AMDGPU::getMCReg(getReg(), AsmParser->getSTI())));