reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
 2111   switch (MI.getIntrinsicID()) {
 2113     if (MachineInstr *BrCond = verifyCFIntrinsic(MI, MRI)) {
 2118       Register Def = MI.getOperand(1).getReg();
 2119       Register Use = MI.getOperand(3).getReg();
 2127       MI.eraseFromParent();
 2135     if (MachineInstr *BrCond = verifyCFIntrinsic(MI, MRI)) {
 2140       Register Reg = MI.getOperand(2).getReg();
 2144       MI.eraseFromParent();
 2154       MI, MRI, B, AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR);
 2156     return legalizeImplicitArgPtr(MI, MRI, B);
 2158     return legalizePreloadedArgIntrin(MI, MRI, B,
 2161     return legalizePreloadedArgIntrin(MI, MRI, B,
 2164     return legalizePreloadedArgIntrin(MI, MRI, B,
 2167     return legalizePreloadedArgIntrin(MI, MRI, B,
 2170     return legalizePreloadedArgIntrin(MI, MRI, B,
 2173     return legalizePreloadedArgIntrin(MI, MRI, B,
 2176     return legalizePreloadedArgIntrin(MI, MRI, B,
 2179     return legalizePreloadedArgIntrin(MI, MRI, B,
 2183       MI, MRI, B, AMDGPUFunctionArgInfo::IMPLICIT_BUFFER_PTR);
 2185     return legalizePreloadedArgIntrin(MI, MRI, B,
 2188     return legalizeFDIVFastIntrin(MI, MRI, B);
 2190     return legalizeIsAddrSpace(MI, MRI, B, AMDGPUAS::LOCAL_ADDRESS);
 2192     return legalizeIsAddrSpace(MI, MRI, B, AMDGPUAS::PRIVATE_ADDRESS);
 2194     B.setInstr(MI);
 2195     B.buildConstant(MI.getOperand(0), ST.getWavefrontSize());
 2196     MI.eraseFromParent();
 2200     return legalizeRawBufferStore(MI, MRI, B, false);
 2202     return legalizeRawBufferStore(MI, MRI, B, true);