reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AMDGPU/AMDGPUISelLowering.cpp

 1543   unsigned BitSize = VT.getSizeInBits();
 1556     jq = DAG.getNode(ISD::XOR, DL, VT, LHS, RHS);
 1559     jq = DAG.getNode(ISD::SRA, DL, VT, jq,
 1560                      DAG.getConstant(BitSize - 2, DL, VT));
 1563     jq = DAG.getNode(ISD::OR, DL, VT, jq, DAG.getConstant(1, DL, VT));
 1563     jq = DAG.getNode(ISD::OR, DL, VT, jq, DAG.getConstant(1, DL, VT));
 1602   EVT SetCCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
 1608   jq = DAG.getNode(ISD::SELECT, DL, VT, cv, jq, DAG.getConstant(0, DL, VT));
 1608   jq = DAG.getNode(ISD::SELECT, DL, VT, cv, jq, DAG.getConstant(0, DL, VT));
 1611   SDValue Div = DAG.getNode(ISD::ADD, DL, VT, iq, jq);
 1614   SDValue Rem = DAG.getNode(ISD::MUL, DL, VT, Div, RHS);
 1615   Rem = DAG.getNode(ISD::SUB, DL, VT, LHS, Rem);
 1621     Div = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Div, InRegSize);
 1622     Rem = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Rem, InRegSize);
 1624     SDValue TruncMask = DAG.getConstant((UINT64_C(1) << DivBits) - 1, DL, VT);
 1625     Div = DAG.getNode(ISD::AND, DL, VT, Div, TruncMask);
 1626     Rem = DAG.getNode(ISD::AND, DL, VT, Rem, TruncMask);