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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 1552 SDValue jq = DAG.getConstant(1, DL, IntVT);
1556 jq = DAG.getNode(ISD::XOR, DL, VT, LHS, RHS);
1559 jq = DAG.getNode(ISD::SRA, DL, VT, jq,
1560 DAG.getConstant(BitSize - 2, DL, VT));
1563 jq = DAG.getNode(ISD::OR, DL, VT, jq, DAG.getConstant(1, DL, VT));
1563 jq = DAG.getNode(ISD::OR, DL, VT, jq, DAG.getConstant(1, DL, VT));
1573 SDValue fa = DAG.getNode(ToFp, DL, FltVT, ia);
1576 SDValue fb = DAG.getNode(ToFp, DL, FltVT, ib);
1578 SDValue fq = DAG.getNode(ISD::FMUL, DL, FltVT,
1579 fa, DAG.getNode(AMDGPUISD::RCP, DL, FltVT, fb));
1582 fq = DAG.getNode(ISD::FTRUNC, DL, FltVT, fq);
1585 SDValue fqneg = DAG.getNode(ISD::FNEG, DL, FltVT, fq);
1591 SDValue fr = DAG.getNode(OpCode, DL, FltVT, fqneg, fb, fa);
1594 SDValue iq = DAG.getNode(ToInt, DL, IntVT, fq);
1597 fr = DAG.getNode(ISD::FABS, DL, FltVT, fr);
1600 fb = DAG.getNode(ISD::FABS, DL, FltVT, fb);
1605 SDValue cv = DAG.getSetCC(DL, SetCCVT, fr, fb, ISD::SETOGE);
1608 jq = DAG.getNode(ISD::SELECT, DL, VT, cv, jq, DAG.getConstant(0, DL, VT));
1608 jq = DAG.getNode(ISD::SELECT, DL, VT, cv, jq, DAG.getConstant(0, DL, VT));
1611 SDValue Div = DAG.getNode(ISD::ADD, DL, VT, iq, jq);
1614 SDValue Rem = DAG.getNode(ISD::MUL, DL, VT, Div, RHS);
1615 Rem = DAG.getNode(ISD::SUB, DL, VT, LHS, Rem);
1621 Div = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Div, InRegSize);
1622 Rem = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Rem, InRegSize);
1624 SDValue TruncMask = DAG.getConstant((UINT64_C(1) << DivBits) - 1, DL, VT);
1625 Div = DAG.getNode(ISD::AND, DL, VT, Div, TruncMask);
1626 Rem = DAG.getNode(ISD::AND, DL, VT, Rem, TruncMask);
1629 return DAG.getMergeValues({ Div, Rem }, DL);