reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  715   unsigned int Opc = N->getOpcode();
  716   if (N->isMachineOpcode()) {
  717     N->setNodeId(-1);
  723   if (Opc == ISD::LOAD || Opc == ISD::STORE || isa<AtomicSDNode>(N) ||
  728     N = glueCopyToM0LDSInit(N);
  728     N = glueCopyToM0LDSInit(N);
  729     SelectCode(N);
  743     if (N->getValueType(0) != MVT::i64)
  746     SelectADD_SUB_I64(N);
  751     if (N->getValueType(0) != MVT::i32)
  754     SelectAddcSubb(N);
  758     SelectUADDO_USUBO(N);
  762     SelectFMUL_W_CHAIN(N);
  766     SelectFMA_W_CHAIN(N);
  772     EVT VT = N->getValueType(0);
  776         if (SDNode *Packed = packConstantV2I16(N, *CurDAG)) {
  777           ReplaceNode(N, Packed);
  787     SelectBuildVector(N, RegClassID);
  792     SDLoc DL(N);
  793     if (N->getValueType(0) == MVT::i128) {
  797     } else if (N->getValueType(0) == MVT::i64) {
  804     const SDValue Ops[] = { RC, N->getOperand(0), SubReg0,
  805                             N->getOperand(1), SubReg1 };
  806     ReplaceNode(N, CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, DL,
  807                                           N->getValueType(0), Ops));
  813     if (N->getValueType(0).getSizeInBits() != 64 || isInlineImmediate(N))
  813     if (N->getValueType(0).getSizeInBits() != 64 || isInlineImmediate(N))
  817     if (ConstantFPSDNode *FP = dyn_cast<ConstantFPSDNode>(N))
  820       ConstantSDNode *C = cast<ConstantSDNode>(N);
  824     SDLoc DL(N);
  825     ReplaceNode(N, buildSMovImm64(DL, Imm, N->getValueType(0)));
  825     ReplaceNode(N, buildSMovImm64(DL, Imm, N->getValueType(0)));
  838     ConstantSDNode *Offset = dyn_cast<ConstantSDNode>(N->getOperand(1));
  842     ConstantSDNode *Width = dyn_cast<ConstantSDNode>(N->getOperand(2));
  851     ReplaceNode(N, getS_BFE(Signed ? AMDGPU::S_BFE_I32 : AMDGPU::S_BFE_U32,
  852                             SDLoc(N), N->getOperand(0), OffsetVal, WidthVal));
  852                             SDLoc(N), N->getOperand(0), OffsetVal, WidthVal));
  856     SelectDIV_SCALE(N);
  860     SelectDIV_FMAS(N);
  865     SelectMAD_64_32(N);
  871     N = Lowering.legalizeTargetIndependentNode(N, *CurDAG);
  871     N = Lowering.legalizeTargetIndependentNode(N, *CurDAG);
  878     if (N->getValueType(0) != MVT::i32)
  881     SelectS_BFE(N);
  884     SelectBRCOND(N);
  888     SelectFMAD_FMA(N);
  891     SelectATOMIC_CMP_SWAP(N);
  899     if (N->getValueType(0) == MVT::i32) {
  901       N = CurDAG->MorphNodeTo(N, N->getOpcode(), CurDAG->getVTList(NewVT),
  901       N = CurDAG->MorphNodeTo(N, N->getOpcode(), CurDAG->getVTList(NewVT),
  901       N = CurDAG->MorphNodeTo(N, N->getOpcode(), CurDAG->getVTList(NewVT),
  902                               { N->getOperand(0), N->getOperand(1) });
  902                               { N->getOperand(0), N->getOperand(1) });
  903       SelectCode(N);
  910     SelectINTRINSIC_W_CHAIN(N);
  914     SelectINTRINSIC_WO_CHAIN(N);
  918     SelectINTRINSIC_VOID(N);
  923   SelectCode(N);