reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
708 switch (Reg) { 768 if (AMDGPU::SReg_32RegClass.contains(Reg)) { 769 assert(!AMDGPU::TTMP_32RegClass.contains(Reg) && 773 } else if (AMDGPU::VGPR_32RegClass.contains(Reg)) { 776 } else if (AMDGPU::AGPR_32RegClass.contains(Reg)) { 780 } else if (AMDGPU::SReg_64RegClass.contains(Reg)) { 781 assert(!AMDGPU::TTMP_64RegClass.contains(Reg) && 785 } else if (AMDGPU::VReg_64RegClass.contains(Reg)) { 788 } else if (AMDGPU::AReg_64RegClass.contains(Reg)) { 792 } else if (AMDGPU::VReg_96RegClass.contains(Reg)) { 795 } else if (AMDGPU::SReg_96RegClass.contains(Reg)) { 797 } else if (AMDGPU::SReg_128RegClass.contains(Reg)) { 798 assert(!AMDGPU::TTMP_128RegClass.contains(Reg) && 802 } else if (AMDGPU::VReg_128RegClass.contains(Reg)) { 805 } else if (AMDGPU::AReg_128RegClass.contains(Reg)) { 809 } else if (AMDGPU::SReg_256RegClass.contains(Reg)) { 810 assert(!AMDGPU::TTMP_256RegClass.contains(Reg) && 814 } else if (AMDGPU::VReg_256RegClass.contains(Reg)) { 817 } else if (AMDGPU::SReg_512RegClass.contains(Reg)) { 818 assert(!AMDGPU::TTMP_512RegClass.contains(Reg) && 822 } else if (AMDGPU::VReg_512RegClass.contains(Reg)) { 825 } else if (AMDGPU::AReg_512RegClass.contains(Reg)) { 829 } else if (AMDGPU::SReg_1024RegClass.contains(Reg)) { 832 } else if (AMDGPU::VReg_1024RegClass.contains(Reg)) { 835 } else if (AMDGPU::AReg_1024RegClass.contains(Reg)) { 842 unsigned HWReg = TRI.getHWRegIndex(Reg);