reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1087 Arg = ArgDescriptor::createRegister(Reg);
lib/Target/AMDGPU/SIISelLowering.cpp1625 Info.setWorkItemIDX(ArgDescriptor::createRegister(Reg)); 1633 Info.setWorkItemIDY(ArgDescriptor::createRegister(Reg)); 1641 Info.setWorkItemIDZ(ArgDescriptor::createRegister(Reg)); 1671 return ArgDescriptor::createRegister(Reg, Mask); 1688 return ArgDescriptor::createRegister(Reg);lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
79 ArgDescriptor::createRegister(ScratchRSrcReg); 81 ArgDescriptor::createRegister(ScratchWaveOffsetReg); 126 ArgDescriptor::createRegister(AMDGPU::SGPR5); 191 ArgDescriptor::createRegister(TRI.getMatchingSuperReg( 198 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( 205 ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( 213 = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( 220 ArgInfo.DispatchID = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( 227 ArgInfo.FlatScratchInit = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( 234 ArgInfo.ImplicitBufferPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg(lib/Target/AMDGPU/SIMachineFunctionInfo.h
543 ArgInfo.WorkGroupIDX = ArgDescriptor::createRegister(getNextSystemSGPR()); 549 ArgInfo.WorkGroupIDY = ArgDescriptor::createRegister(getNextSystemSGPR()); 555 ArgInfo.WorkGroupIDZ = ArgDescriptor::createRegister(getNextSystemSGPR()); 561 ArgInfo.WorkGroupInfo = ArgDescriptor::createRegister(getNextSystemSGPR()); 581 = ArgDescriptor::createRegister(getNextSystemSGPR()); 587 ArgInfo.PrivateSegmentWaveByteOffset = ArgDescriptor::createRegister(Reg);