reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
   64   unsigned Opcode = MI->getOpcode();
   67     if (printSysAlias(MI, STI, O)) {
   75     const MCOperand &Op0 = MI->getOperand(0);
   76     const MCOperand &Op1 = MI->getOperand(1);
   77     const MCOperand &Op2 = MI->getOperand(2);
   78     const MCOperand &Op3 = MI->getOperand(3);
  169     const MCOperand &Op0 = MI->getOperand(0); // Op1 == Op0
  170     const MCOperand &Op2 = MI->getOperand(2);
  171     int ImmR = MI->getOperand(3).getImm();
  172     int ImmS = MI->getOperand(4).getImm();
  213       MI->getOperand(1).isExpr()) {
  219     O << getRegisterName(MI->getOperand(0).getReg()) << ", #";
  220     MI->getOperand(1).getExpr()->print(O, &MAI);
  225       MI->getOperand(2).isExpr()) {
  226     O << "\tmovk\t" << getRegisterName(MI->getOperand(0).getReg()) << ", #";
  227     MI->getOperand(2).getExpr()->print(O, &MAI);
  237       MI->getOperand(1).isImm() && MI->getOperand(2).isImm()) {
  237       MI->getOperand(1).isImm() && MI->getOperand(2).isImm()) {
  239     int Shift = MI->getOperand(2).getImm();
  240     uint64_t Value = (uint64_t)MI->getOperand(1).getImm() << Shift;
  244       O << "\tmov\t" << getRegisterName(MI->getOperand(0).getReg()) << ", #"
  251       MI->getOperand(1).isImm() && MI->getOperand(2).isImm()) {
  251       MI->getOperand(1).isImm() && MI->getOperand(2).isImm()) {
  253     int Shift = MI->getOperand(2).getImm();
  254     uint64_t Value = ~((uint64_t)MI->getOperand(1).getImm() << Shift);
  259       O << "\tmov\t" << getRegisterName(MI->getOperand(0).getReg()) << ", #"
  266       (MI->getOperand(1).getReg() == AArch64::XZR ||
  267        MI->getOperand(1).getReg() == AArch64::WZR) &&
  268       MI->getOperand(2).isImm()) {
  271         MI->getOperand(2).getImm(), RegWidth);
  273       O << "\tmov\t" << getRegisterName(MI->getOperand(0).getReg()) << ", #"
  292   if (!printAliasInstr(MI, STI, O))
  293     printInstruction(MI, STI, O);
  298       (MI->getOperand(0).getReg() == AArch64::XZR ||
  299        MI->getOperand(0).getReg() == AArch64::WZR)) {