reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
 3891   const MCInstrDesc &MCID = MII.get(Inst.getOpcode());
 3898   NextPrefix = PrefixInfo::CreateFromInst(Inst, MCID.TSFlags);
 3904       (Inst.getOpcode() != AArch64::BRK) &&
 3905       (Inst.getOpcode() != AArch64::HLT)) {
 3914     if (Inst.getOperand(0).getReg() != Prefix.getDstReg())
 3919     for (unsigned i = 1; i < Inst.getNumOperands(); ++i) {
 3920       if (Inst.getOperand(i).isReg() &&
 3922           isMatchingOrAlias(Prefix.getDstReg(), Inst.getOperand(i).getReg()))
 3933       for (unsigned i = 1; i < Inst.getNumOperands(); ++i)
 3934         if (Inst.getOperand(i).isReg() &&
 3935             PPRRegClass.contains(Inst.getOperand(i).getReg())) {
 3947       if (Inst.getOperand(PgIdx).getReg() != Prefix.getPgReg())
 3961   switch (Inst.getOpcode()) {
 3967     unsigned Rt = Inst.getOperand(1).getReg();
 3968     unsigned Rt2 = Inst.getOperand(2).getReg();
 3969     unsigned Rn = Inst.getOperand(3).getReg();
 3984     unsigned Rt = Inst.getOperand(0).getReg();
 3985     unsigned Rt2 = Inst.getOperand(1).getReg();
 3997     unsigned Rt = Inst.getOperand(1).getReg();
 3998     unsigned Rt2 = Inst.getOperand(2).getReg();
 4013     unsigned Rt = Inst.getOperand(1).getReg();
 4014     unsigned Rt2 = Inst.getOperand(2).getReg();
 4015     unsigned Rn = Inst.getOperand(3).getReg();
 4046     unsigned Rt = Inst.getOperand(1).getReg();
 4047     unsigned Rn = Inst.getOperand(2).getReg();
 4065     unsigned Rt = Inst.getOperand(1).getReg();
 4066     unsigned Rn = Inst.getOperand(2).getReg();
 4080     unsigned Rs = Inst.getOperand(0).getReg();
 4081     unsigned Rt = Inst.getOperand(1).getReg();
 4082     unsigned Rn = Inst.getOperand(2).getReg();
 4093     unsigned Rs = Inst.getOperand(0).getReg();
 4094     unsigned Rt1 = Inst.getOperand(1).getReg();
 4095     unsigned Rt2 = Inst.getOperand(2).getReg();
 4096     unsigned Rn = Inst.getOperand(3).getReg();
 4109   switch (Inst.getOpcode()) {
 4120     if (Inst.getOperand(2).isExpr()) {
 4121       const MCExpr *Expr = Inst.getOperand(2).getExpr();
 4130             Inst.getOpcode() == AArch64::ADDXri)
 4144             (Inst.getOpcode() == AArch64::ADDXri ||
 4145              Inst.getOpcode() == AArch64::ADDWri))