reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
65857 /*160355*/ /*SwitchOpcode*/ 27, TARGET_VAL(AArch64ISD::VLSHR),// ->160385 65928 /*160483*/ /*SwitchOpcode*/ 28, TARGET_VAL(AArch64ISD::VLSHR),// ->160514 68753 /*165579*/ /*SwitchOpcode*/ 33|128,1/*161*/, TARGET_VAL(AArch64ISD::VLSHR),// ->165744 69103 /*166247*/ /*SwitchOpcode*/ 34|128,1/*162*/, TARGET_VAL(AArch64ISD::VLSHR),// ->166413 96006 /*217471*/ /*SwitchOpcode*/ 36|128,1/*164*/, TARGET_VAL(AArch64ISD::VLSHR),// ->217639 99709 /*224483*/ OPC_SwitchOpcode /*2 cases */, 64|128,1/*192*/, TARGET_VAL(AArch64ISD::VLSHR),// ->224680 108212 /*241597*/ OPC_SwitchOpcode /*2 cases */, 99|128,2/*355*/, TARGET_VAL(AArch64ISD::VLSHR),// ->241957gen/lib/Target/AArch64/AArch64GenFastISel.inc
8503 case AArch64ISD::VLSHR: return fastEmit_AArch64ISD_VLSHR_ri_Predicate_vecshiftR64(VT, RetVT, Op0, Op0IsKill, imm1); 8875 case AArch64ISD::VLSHR: return fastEmit_AArch64ISD_VLSHR_ri_Predicate_vecshiftR8(VT, RetVT, Op0, Op0IsKill, imm1); 8999 case AArch64ISD::VLSHR: return fastEmit_AArch64ISD_VLSHR_ri_Predicate_vecshiftR16(VT, RetVT, Op0, Op0IsKill, imm1); 9123 case AArch64ISD::VLSHR: return fastEmit_AArch64ISD_VLSHR_ri_Predicate_vecshiftR32(VT, RetVT, Op0, Op0IsKill, imm1);lib/Target/AArch64/AArch64ISelLowering.cpp
1237 case AArch64ISD::VLSHR: return "AArch64ISD::VLSHR"; 7381 if ((ShiftOpc != AArch64ISD::VSHL && ShiftOpc != AArch64ISD::VLSHR)) 7383 bool IsShiftRight = ShiftOpc == AArch64ISD::VLSHR; 8028 (Op.getOpcode() == ISD::SRA) ? AArch64ISD::VASHR : AArch64ISD::VLSHR;