|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
lib/Target/AArch64/AArch64ISelLowering.cpp 6789 if (VT.getVectorElementType() == MVT::i32 ||
6790 VT.getVectorElementType() == MVT::f32)
6791 return DAG.getNode(AArch64ISD::REV64, dl, VT, OpLHS);
6793 if (VT.getVectorElementType() == MVT::i16 ||
6794 VT.getVectorElementType() == MVT::f16)
6795 return DAG.getNode(AArch64ISD::REV32, dl, VT, OpLHS);
6797 assert(VT.getVectorElementType() == MVT::i8);
6798 return DAG.getNode(AArch64ISD::REV16, dl, VT, OpLHS);
6803 EVT EltTy = VT.getVectorElementType();
6816 if (VT.getSizeInBits() == 64)
6819 return DAG.getNode(Opcode, dl, VT, OpLHS, Lane);
6825 return DAG.getNode(AArch64ISD::EXT, dl, VT, OpLHS, OpRHS,
6829 return DAG.getNode(AArch64ISD::UZP1, dl, DAG.getVTList(VT, VT), OpLHS,
6829 return DAG.getNode(AArch64ISD::UZP1, dl, DAG.getVTList(VT, VT), OpLHS,
6832 return DAG.getNode(AArch64ISD::UZP2, dl, DAG.getVTList(VT, VT), OpLHS,
6832 return DAG.getNode(AArch64ISD::UZP2, dl, DAG.getVTList(VT, VT), OpLHS,
6835 return DAG.getNode(AArch64ISD::ZIP1, dl, DAG.getVTList(VT, VT), OpLHS,
6835 return DAG.getNode(AArch64ISD::ZIP1, dl, DAG.getVTList(VT, VT), OpLHS,
6838 return DAG.getNode(AArch64ISD::ZIP2, dl, DAG.getVTList(VT, VT), OpLHS,
6838 return DAG.getNode(AArch64ISD::ZIP2, dl, DAG.getVTList(VT, VT), OpLHS,
6841 return DAG.getNode(AArch64ISD::TRN1, dl, DAG.getVTList(VT, VT), OpLHS,
6841 return DAG.getNode(AArch64ISD::TRN1, dl, DAG.getVTList(VT, VT), OpLHS,
6844 return DAG.getNode(AArch64ISD::TRN2, dl, DAG.getVTList(VT, VT), OpLHS,
6844 return DAG.getNode(AArch64ISD::TRN2, dl, DAG.getVTList(VT, VT), OpLHS,