reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AArch64/AArch64ISelLowering.cpp
11718   switch (N->getOpcode()) {
11724     return performAddSubLongCombine(N, DCI, DAG);
11726     return performXorCombine(N, DAG, DCI, Subtarget);
11728     return performMulCombine(N, DAG, DCI, Subtarget);
11731     return performIntToFpCombine(N, DAG, Subtarget);
11734     return performFpToIntCombine(N, DAG, DCI, Subtarget);
11736     return performFDivCombine(N, DAG, DCI, Subtarget);
11738     return performORCombine(N, DCI, Subtarget);
11740     return performANDCombine(N, DCI);
11742     return performSRLCombine(N, DCI);
11744     return performIntrinsicCombine(N, DCI, Subtarget);
11748     return performExtendCombine(N, DCI, DAG);
11750     return performBitcastCombine(N, DCI, DAG);
11752     return performConcatVectorsCombine(N, DCI, DAG);
11754     return performSelectCombine(N, DCI);
11756     return performVSelectCombine(N, DCI.DAG);
11758     if (performTBISimplification(N->getOperand(1), DCI, DAG))
11759       return SDValue(N, 0);
11762     return performSTORECombine(N, DCI, DAG, Subtarget);
11764     return performBRCONDCombine(N, DCI, DAG);
11767     return performTBZCombine(N, DCI, DAG);
11769     return performCONDCombine(N, DCI, DAG, 2, 3);
11771     return performPostLD1Combine(N, DCI, false);
11773     return performNVCASTCombine(N);
11775     return performPostLD1Combine(N, DCI, true);
11778     switch (cast<ConstantSDNode>(N->getOperand(1))->getZExtValue()) {
11800       return performNEONPostLDSTCombine(N, DCI, DAG);
11806     return performGlobalAddressCombine(N, DAG, Subtarget, getTargetMachine());