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References

lib/Target/AArch64/AArch64ISelLowering.cpp
 2140       LHS = DAG.getNode(ExtendOpc, DL, MVT::i64, LHS);
 2141       RHS = DAG.getNode(ExtendOpc, DL, MVT::i64, RHS);
 2142       SDValue Mul = DAG.getNode(ISD::MUL, DL, MVT::i64, LHS, RHS);
 2143       SDValue Add = DAG.getNode(ISD::ADD, DL, MVT::i64, Mul,
 2144                                 DAG.getConstant(0, DL, MVT::i64));
 2149       Value = DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Add);
 2156         SDValue UpperBits = DAG.getNode(ISD::SRL, DL, MVT::i64, Add,
 2157                                         DAG.getConstant(32, DL, MVT::i64));
 2158         UpperBits = DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, UpperBits);
 2159         SDValue LowerBits = DAG.getNode(ISD::SRA, DL, MVT::i32, Value,
 2160                                         DAG.getConstant(31, DL, MVT::i64));
 2164         Overflow = DAG.getNode(AArch64ISD::SUBS, DL, VTs, UpperBits, LowerBits)
 2172         SDValue UpperBits = DAG.getNode(ISD::SRL, DL, MVT::i64, Mul,
 2173                                         DAG.getConstant(32, DL, MVT::i64));
 2176             DAG.getNode(AArch64ISD::SUBS, DL, VTs,
 2177                         DAG.getConstant(0, DL, MVT::i64),
 2184     Value = DAG.getNode(ISD::MUL, DL, MVT::i64, LHS, RHS);
 2186       SDValue UpperBits = DAG.getNode(ISD::MULHS, DL, MVT::i64, LHS, RHS);
 2187       SDValue LowerBits = DAG.getNode(ISD::SRA, DL, MVT::i64, Value,
 2188                                       DAG.getConstant(63, DL, MVT::i64));
 2192       Overflow = DAG.getNode(AArch64ISD::SUBS, DL, VTs, UpperBits, LowerBits)
 2195       SDValue UpperBits = DAG.getNode(ISD::MULHU, DL, MVT::i64, LHS, RHS);
 2198           DAG.getNode(AArch64ISD::SUBS, DL, VTs,
 2199                       DAG.getConstant(0, DL, MVT::i64),
 2210     Value = DAG.getNode(Opc, DL, VTs, LHS, RHS);