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References

lib/Target/AArch64/AArch64ISelLowering.cpp
 5663   SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64,
 5664                                  DAG.getConstant(VTBits, dl, MVT::i64), ShAmt);
 5665   SDValue LoBitsForHi = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt);
 5669   SDValue Cmp = emitComparison(ShAmt, DAG.getConstant(0, dl, MVT::i64),
 5670                                ISD::SETEQ, dl, DAG);
 5671   SDValue CCVal = DAG.getConstant(AArch64CC::EQ, dl, MVT::i32);
 5673       DAG.getNode(AArch64ISD::CSEL, dl, VT, DAG.getConstant(0, dl, MVT::i64),
 5673       DAG.getNode(AArch64ISD::CSEL, dl, VT, DAG.getConstant(0, dl, MVT::i64),
 5676   SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64, ShAmt,
 5677                                    DAG.getConstant(VTBits, dl, MVT::i64));
 5678   SDValue HiBitsForHi = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt);
 5680       DAG.getNode(ISD::OR, dl, VT, LoBitsForHi, HiBitsForHi);
 5682   SDValue HiForBigShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ExtraShAmt);
 5684   Cmp = emitComparison(ExtraShAmt, DAG.getConstant(0, dl, MVT::i64), ISD::SETGE,
 5685                        dl, DAG);
 5686   CCVal = DAG.getConstant(AArch64CC::GE, dl, MVT::i32);
 5687   SDValue Hi = DAG.getNode(AArch64ISD::CSEL, dl, VT, HiForBigShift,
 5692   SDValue LoForBigShift = DAG.getConstant(0, dl, VT);
 5693   SDValue LoForNormalShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt);
 5694   SDValue Lo = DAG.getNode(AArch64ISD::CSEL, dl, VT, LoForBigShift,
 5698   return DAG.getMergeValues(Ops, dl);