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References

lib/Target/AArch64/AArch64ISelLowering.cpp
 5608   SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64,
 5609                                  DAG.getConstant(VTBits, dl, MVT::i64), ShAmt);
 5610   SDValue HiBitsForLo = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt);
 5614   SDValue Cmp = emitComparison(ShAmt, DAG.getConstant(0, dl, MVT::i64),
 5615                                ISD::SETEQ, dl, DAG);
 5616   SDValue CCVal = DAG.getConstant(AArch64CC::EQ, dl, MVT::i32);
 5618       DAG.getNode(AArch64ISD::CSEL, dl, VT, DAG.getConstant(0, dl, MVT::i64),
 5618       DAG.getNode(AArch64ISD::CSEL, dl, VT, DAG.getConstant(0, dl, MVT::i64),
 5621   SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64, ShAmt,
 5622                                    DAG.getConstant(VTBits, dl, MVT::i64));
 5624   SDValue LoBitsForLo = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt);
 5626       DAG.getNode(ISD::OR, dl, VT, LoBitsForLo, HiBitsForLo);
 5628   Cmp = emitComparison(ExtraShAmt, DAG.getConstant(0, dl, MVT::i64), ISD::SETGE,
 5629                        dl, DAG);
 5630   CCVal = DAG.getConstant(AArch64CC::GE, dl, MVT::i32);
 5631   SDValue LoForBigShift = DAG.getNode(Opc, dl, VT, ShOpHi, ExtraShAmt);
 5632   SDValue Lo = DAG.getNode(AArch64ISD::CSEL, dl, VT, LoForBigShift,
 5637   SDValue HiForNormalShift = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt);
 5640           ? DAG.getNode(Opc, dl, VT, ShOpHi,
 5641                         DAG.getConstant(VTBits - 1, dl, MVT::i64))
 5642           : DAG.getConstant(0, dl, VT);
 5643   SDValue Hi = DAG.getNode(AArch64ISD::CSEL, dl, VT, HiForBigShift,
 5647   return DAG.getMergeValues(Ops, dl);