|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/Target/AArch64/AArch64ISelLowering.cpp 4684 MachineFunction &MF = DAG.getMachineFunction();
4695 softenSetCCOperands(DAG, MVT::f128, LHS, RHS, CC, dl, LHS, RHS);
4700 RHS = DAG.getConstant(0, dl, LHS.getValueType());
4710 if (!DAG.getTargetLoweringInfo().isTypeLegal(LHS->getValueType(0)))
4716 std::tie(Value, Overflow) = getAArch64XALUOOp(OFCC, LHS.getValue(0), DAG);
4720 SDValue CCVal = DAG.getConstant(OFCC, dl, MVT::i32);
4722 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal,
4744 return DAG.getNode(AArch64ISD::TBZ, dl, MVT::Other, Chain, Test,
4745 DAG.getConstant(Log2_64(Mask), dl, MVT::i64),
4749 return DAG.getNode(AArch64ISD::CBZ, dl, MVT::Other, Chain, LHS, Dest);
4760 return DAG.getNode(AArch64ISD::TBNZ, dl, MVT::Other, Chain, Test,
4761 DAG.getConstant(Log2_64(Mask), dl, MVT::i64),
4765 return DAG.getNode(AArch64ISD::CBNZ, dl, MVT::Other, Chain, LHS, Dest);
4771 return DAG.getNode(AArch64ISD::TBNZ, dl, MVT::Other, Chain, LHS,
4772 DAG.getConstant(Mask, dl, MVT::i64), Dest);
4781 return DAG.getNode(AArch64ISD::TBZ, dl, MVT::Other, Chain, LHS,
4782 DAG.getConstant(Mask, dl, MVT::i64), Dest);
4786 SDValue Cmp = getAArch64Cmp(LHS, RHS, CC, CCVal, DAG, dl);
4787 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal,
4796 SDValue Cmp = emitComparison(LHS, RHS, CC, dl, DAG);
4799 SDValue CC1Val = DAG.getConstant(CC1, dl, MVT::i32);
4801 DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CC1Val, Cmp);
4803 SDValue CC2Val = DAG.getConstant(CC2, dl, MVT::i32);
4804 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, BR1, Dest, CC2Val,