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References

lib/Target/AArch64/AArch64ISelLowering.cpp
12060     ReplaceBITCASTResults(N, Results, DAG);
12067     Results.push_back(LowerVECREDUCE(SDValue(N, 0), DAG));
12071     ReplaceReductionResults(N, Results, DAG, ISD::ADD, AArch64ISD::SADDV);
12074     ReplaceReductionResults(N, Results, DAG, ISD::ADD, AArch64ISD::UADDV);
12077     ReplaceReductionResults(N, Results, DAG, ISD::SMIN, AArch64ISD::SMINV);
12080     ReplaceReductionResults(N, Results, DAG, ISD::UMIN, AArch64ISD::UMINV);
12083     ReplaceReductionResults(N, Results, DAG, ISD::SMAX, AArch64ISD::SMAXV);
12086     ReplaceReductionResults(N, Results, DAG, ISD::UMAX, AArch64ISD::UMAXV);
12094     ReplaceCMP_SWAP_128Results(N, Results, DAG, Subtarget);