reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1034 int64_t Offset = Addr.getOffset(); 1044 if (!ImmediateOffsetNeedsLowering && Addr.getOffset() && Addr.getOffsetReg()) 1044 if (!ImmediateOffsetNeedsLowering && Addr.getOffset() && Addr.getOffsetReg()) 1048 if (Addr.isRegBase() && Addr.getOffsetReg() && !Addr.getReg()) 1048 if (Addr.isRegBase() && Addr.getOffsetReg() && !Addr.getReg()) 1048 if (Addr.isRegBase() && Addr.getOffsetReg() && !Addr.getReg()) 1054 if ((ImmediateOffsetNeedsLowering || Addr.getOffsetReg()) && Addr.isFIBase()) 1054 if ((ImmediateOffsetNeedsLowering || Addr.getOffsetReg()) && Addr.isFIBase()) 1059 .addFrameIndex(Addr.getFI()) 1062 Addr.setKind(Address::RegBase); 1063 Addr.setReg(ResultReg); 1068 if (Addr.getReg()) { 1069 if (Addr.getExtendType() == AArch64_AM::SXTW || 1070 Addr.getExtendType() == AArch64_AM::UXTW ) 1071 ResultReg = emitAddSub_rx(/*UseAdd=*/true, MVT::i64, Addr.getReg(), 1072 /*TODO:IsKill=*/false, Addr.getOffsetReg(), 1073 /*TODO:IsKill=*/false, Addr.getExtendType(), 1074 Addr.getShift()); 1076 ResultReg = emitAddSub_rs(/*UseAdd=*/true, MVT::i64, Addr.getReg(), 1077 /*TODO:IsKill=*/false, Addr.getOffsetReg(), 1079 Addr.getShift()); 1081 if (Addr.getExtendType() == AArch64_AM::UXTW) 1082 ResultReg = emitLSL_ri(MVT::i64, MVT::i32, Addr.getOffsetReg(), 1083 /*Op0IsKill=*/false, Addr.getShift(), 1085 else if (Addr.getExtendType() == AArch64_AM::SXTW) 1086 ResultReg = emitLSL_ri(MVT::i64, MVT::i32, Addr.getOffsetReg(), 1087 /*Op0IsKill=*/false, Addr.getShift(), 1090 ResultReg = emitLSL_ri(MVT::i64, MVT::i64, Addr.getOffsetReg(), 1091 /*Op0IsKill=*/false, Addr.getShift()); 1096 Addr.setReg(ResultReg); 1097 Addr.setOffsetReg(0); 1098 Addr.setShift(0); 1099 Addr.setExtendType(AArch64_AM::InvalidShiftExtend); 1106 if (Addr.getReg()) 1108 ResultReg = emitAdd_ri_(MVT::i64, Addr.getReg(), /*IsKill=*/false, Offset); 1114 Addr.setReg(ResultReg); 1115 Addr.setOffset(0);