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reference to multiple definitions → definitions
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References

lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
  407   unsigned Opcode = MI.getOpcode();
  437     switch (MI.getOpcode()) {
  466         BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opcode),
  467                 MI.getOperand(0).getReg())
  468             .add(MI.getOperand(1))
  469             .add(MI.getOperand(2))
  471     transferImpOps(MI, MIB1, MIB1);
  472     MI.eraseFromParent();
  478     Register DstReg = MI.getOperand(0).getReg();
  479     const MachineOperand &MO1 = MI.getOperand(1);
  484       MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
  498       MachineFunction &MF = *MI.getParent()->getParent();
  499       DebugLoc DL = MI.getDebugLoc();
  501           BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg);
  507         unsigned DstFlags = MI.getOperand(0).getTargetFlags();
  508         MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::LDRWui))
  513         unsigned DstReg = MI.getOperand(0).getReg();
  515                    .add(MI.getOperand(0))
  538       transferImpOps(MI, MIB1, MIB2);
  540     MI.eraseFromParent();
  551     Register DstReg = MI.getOperand(0).getReg();
  553         BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg)
  554             .add(MI.getOperand(1));
  556     if (MI.getOperand(1).getTargetFlags() & AArch64II::MO_TAGGED) {
  564       auto Tag = MI.getOperand(1);
  567       BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MOVKXi), DstReg)
  574         BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADDXri))
  575             .add(MI.getOperand(0))
  577             .add(MI.getOperand(2))
  580     transferImpOps(MI, MIB1, MIB2);
  581     MI.eraseFromParent();
  586     BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADDXri))
  587         .add(MI.getOperand(0))
  588         .add(MI.getOperand(1))
  589         .add(MI.getOperand(2))
  591     MI.eraseFromParent();
  595     Register DstReg = MI.getOperand(0).getReg();
  607     BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MRS), DstReg)
  609     MI.eraseFromParent();
  624         BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::RET))
  626     transferImpOps(MI, MIB, MIB);
  627     MI.eraseFromParent();
  656     BuildMI(MBB, MBBI, MI.getDebugLoc(),
  659       .add(MI.getOperand(0))
  660       .add(MI.getOperand(1));
  661     transferImpOps(MI, MIB, MIB);
  662     MI.eraseFromParent();
  683        SrcReg = MI.getOperand(0).getReg();
  684        emitFrameOffset(MBB, &MI, MI.getDebugLoc(), SrcReg, FrameReg,
  684        emitFrameOffset(MBB, &MI, MI.getDebugLoc(), SrcReg, FrameReg,
  687      BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::IRG))
  688          .add(MI.getOperand(0))
  690          .add(MI.getOperand(2));
  691      MI.eraseFromParent();
  695      BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADDG))
  696          .add(MI.getOperand(0))
  697          .add(MI.getOperand(1))
  698          .add(MI.getOperand(2))
  699          .add(MI.getOperand(4));
  700      MI.eraseFromParent();