reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/MC/MCRegisterInfo.h

  344   MCRegister getSubReg(MCRegister Reg, unsigned Idx) const;

References

include/llvm/CodeGen/TargetRegisterInfo.h

  980     return static_cast<const MCRegisterInfo *>(this)->getSubReg(Reg, Idx);

lib/MC/MCRegisterInfo.cpp

   27     if (RC->contains(*Supers) && Reg == getSubReg(*Supers, SubIdx))

lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp

 1245   unsigned Even = MRI.getSubReg(Reg,  Sube);
 1246   unsigned Odd = MRI.getSubReg(Reg,  Subo);
 1275   if (unsigned FirstReg = MRI.getSubReg(Reg, AArch64::dsub0))
 1277   else if (unsigned FirstReg = MRI.getSubReg(Reg, AArch64::qsub0))
 1279   else if (unsigned FirstReg = MRI.getSubReg(Reg, AArch64::zsub0))

lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp

  555     unsigned VdataSub0 = MRI.getSubReg(Vdata0, AMDGPU::sub0);
  571     unsigned VAddrSub0 = MRI.getSubReg(VAddr0, AMDGPU::sub0);

lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

  959   const unsigned FirstSubReg = TRI->getSubReg(Reg, 1);

lib/Target/ARM/ARMBaseRegisterInfo.cpp

  295       return RI->getSubReg(*Supers, Odd ? ARM::gsub_1 : ARM::gsub_0);

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

  302     return MRI->getSubReg(QReg, ARM::dsub_0);

lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp

  829   printRegName(O, MRI.getSubReg(Reg, ARM::gsub_0));
  831   printRegName(O, MRI.getSubReg(Reg, ARM::gsub_1));
 1436   unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0);
 1437   unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_1);
 1449   unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0);
 1450   unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_2);
 1504   unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0);
 1505   unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_1);
 1551   unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0);
 1552   unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_2);
 1633     printRegName(O, MRI.getSubReg(Reg, ARM::qsub_0 + i));

lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp

   93     unsigned RegLoNum = MRI.getSubReg(RegNum, AVR::sub_lo);

lib/Target/Hexagon/HexagonAsmPrinter.cpp

  463       unsigned High = RI->getSubReg(MO1.getReg(), Hexagon::isub_hi);
  464       unsigned Low = RI->getSubReg(MO1.getReg(), Hexagon::isub_lo);
  540     unsigned High = RI->getSubReg(MO.getReg(), Hexagon::isub_hi);
  541     unsigned Low = RI->getSubReg(MO.getReg(), Hexagon::isub_lo);
  552     unsigned High = RI->getSubReg(MO.getReg(), Hexagon::isub_hi);
  553     unsigned Low = RI->getSubReg(MO.getReg(), Hexagon::isub_lo);
  566     unsigned High = RI->getSubReg(MO.getReg(), Hexagon::isub_hi);
  567     unsigned Low = RI->getSubReg(MO.getReg(), Hexagon::isub_lo);