reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
687 MachineInstr *NewMI = TII->commuteInstruction(*MI, false, RegBIdx, RegCIdx); 735 MachineInstr *NewMI = TII->convertToThreeAddress(MFI, *mi, LV); 779 while (MachineInstr *UseMI = findOnlyInterestingUse(Reg, MBB, MRI, TII,IsCopy, 835 if (!isCopyToReg(*MI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys)) 903 if (TII->getInstrLatency(InstrItins, *MI) > 1) 1036 if (TII->getInstrLatency(InstrItins, DefMI) > (Dist - DefDist)) 1219 !TII->findCommutedOpIndices(*MI, BaseOpIdx, OtherOpIdx)) 1227 bool OtherOpKilled = isKilled(*MI, OtherOpReg, MRI, TII, LIS, false); 1282 bool regBKilled = isKilled(MI, regB, MRI, TII, LIS, true); 1314 regBKilled = isKilled(MI, regB, MRI, TII, LIS, true); 1352 TII->getOpcodeAfterMemoryUnfold(MI.getOpcode(), 1357 const MCInstrDesc &UnfoldMCID = TII->get(NewOpc); 1363 TII->getRegClass(UnfoldMCID, LoadRegIndex, TRI, *MF)); 1366 if (!TII->unfoldMemoryOperand(*MF, MI, Reg, 1486 if (const TargetRegisterClass *RC = TII->getRegClass(MCID, SrcIdx, 1553 TII->get(TargetOpcode::COPY), RegA); 1670 TII = MF->getSubtarget().getInstrInfo(); 1771 mi->setDesc(TII->get(TargetOpcode::COPY)); 1838 TII->get(TargetOpcode::COPY)) 1863 MI.setDesc(TII->get(TargetOpcode::IMPLICIT_DEF));