reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1801 Register DstReg = MI.getOperand(0).getReg(); 1802 if (MI.getOperand(0).getSubReg() || Register::isPhysicalRegister(DstReg) || 1803 !(MI.getNumOperands() & 1)) { 1804 LLVM_DEBUG(dbgs() << "Illegal REG_SEQUENCE instruction:" << MI); 1810 OrigRegs.push_back(MI.getOperand(0).getReg()); 1811 for (unsigned i = 1, e = MI.getNumOperands(); i < e; i += 2) 1812 OrigRegs.push_back(MI.getOperand(i).getReg()); 1816 for (unsigned i = 1, e = MI.getNumOperands(); i < e; i += 2) { 1817 MachineOperand &UseMO = MI.getOperand(i); 1819 unsigned SubIdx = MI.getOperand(i+1).getImm(); 1829 if (MI.getOperand(j).getReg() == SrcReg) { 1830 MI.getOperand(j).setIsKill(); 1837 MachineInstr *CopyMI = BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), 1837 MachineInstr *CopyMI = BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), 1837 MachineInstr *CopyMI = BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), 1853 LV->replaceKillInstruction(SrcReg, MI, *CopyMI); 1859 std::next(MachineBasicBlock::iterator(MI)); 1862 LLVM_DEBUG(dbgs() << "Turned: " << MI << " into an IMPLICIT_DEF"); 1863 MI.setDesc(TII->get(TargetOpcode::IMPLICIT_DEF)); 1864 for (int j = MI.getNumOperands() - 1, ee = 0; j > ee; --j) 1865 MI.RemoveOperand(j); 1867 LLVM_DEBUG(dbgs() << "Eliminated: " << MI); 1868 MI.eraseFromParent();