reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
432 AnalysisID addPass(AnalysisID PassID, bool verifyAfter = true,
824 addPass(&FinalizeISelID); 894 addPass(&LocalStackSlotAllocationID, false); 915 addPass(&PostRAMachineSinkingID); 916 addPass(&ShrinkWrapID); 929 addPass(&ExpandPostRAPseudosID); 935 addPass(&ImplicitNullChecksID); 943 addPass(&PostMachineSchedulerID); 945 addPass(&PostRASchedulerID); 965 addPass(&FuncletLayoutID, false); 967 addPass(&StackMapLivenessID, false); 968 addPass(&LiveDebugValuesID, false); 971 addPass(&FEntryInserterID, false); 973 addPass(&XRayInstrumentationID, false); 974 addPass(&PatchableFunctionID, false); 994 addPass(&EarlyTailDuplicateID); 998 addPass(&OptimizePHIsID, false); 1002 addPass(&StackColoringID, false); 1006 addPass(&LocalStackSlotAllocationID, false); 1012 addPass(&DeadMachineInstructionElimID); 1019 addPass(&EarlyMachineLICMID, false); 1020 addPass(&MachineCSEID, false); 1022 addPass(&MachineSinkingID); 1024 addPass(&PeepholeOptimizerID); 1027 addPass(&DeadMachineInstructionElimID); 1111 addPass(&VirtRegRewriterID); 1116 addPass(&StackSlotColoringID); 1130 addPass(&PHIEliminationID, false); 1131 addPass(&TwoAddressInstructionPassID, false); 1140 addPass(&DetectDeadLanesID, false); 1142 addPass(&ProcessImplicitDefsID, false); 1150 addPass(&LiveVariablesID, false); 1153 addPass(&MachineLoopInfoID, false); 1154 addPass(&PHIEliminationID, false); 1158 addPass(&LiveIntervalsID, false); 1160 addPass(&TwoAddressInstructionPassID, false); 1161 addPass(&RegisterCoalescerID); 1166 addPass(&RenameIndependentSubregsID); 1169 addPass(&MachineSchedulerID); 1178 addPass(&MachineCopyPropagationID); 1183 addPass(&MachineLICMID); 1194 addPass(&BranchFolderPassID); 1201 addPass(&TailDuplicateID); 1204 addPass(&MachineCopyPropagationID); 1209 addPass(&GCMachineCodeAnalysisID, false); 1215 if (addPass(&MachineBlockPlacementID)) { 1218 addPass(&MachineBlockPlacementStatsID);lib/Target/AArch64/AArch64TargetMachine.cpp
549 addPass(&MachineCombinerID); 553 addPass(&EarlyIfConverterID); 572 addPass(&PeepholeOptimizerID); 620 addPass(&BranchRelaxationPassID);lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
746 addPass(&AMDGPUPerfHintAnalysisID); 795 addPass(&IfConverterID, false); 802 addPass(&FinalizeMachineBundlesID, false); 835 addPass(&AMDGPUUnifyDivergentExitNodesID); 859 addPass(&SIFoldOperandsID); 861 addPass(&GCNDPPCombineID); 862 addPass(&DeadMachineInstructionElimID); 863 addPass(&SILoadStoreOptimizerID); 865 addPass(&SIPeepholeSDWAID); 866 addPass(&EarlyMachineLICMID); 867 addPass(&MachineCSEID); 868 addPass(&SIFoldOperandsID); 869 addPass(&DeadMachineInstructionElimID); 876 addPass(&EarlyIfConverterID); 884 addPass(&SIFixSGPRCopiesID); 957 addPass(&GCNNSAReassignID); 958 addPass(&GCNRegBankReassignID); 964 addPass(&SIFixVGPRCopiesID); 966 addPass(&SIOptimizeExecMaskingID); 970 addPass(&SILowerSGPRSpillsID); 993 addPass(&PostRAHazardRecognizerID); 995 addPass(&SIInsertSkipsPassID); 996 addPass(&BranchRelaxationPassID);lib/Target/AVR/AVRTargetMachine.cpp
121 addPass(&BranchRelaxationPassID);
lib/Target/Hexagon/HexagonTargetMachine.cpp354 addPass(&UnreachableMachineBlockElimID); 377 addPass(&MachinePipelinerID); 394 addPass(&IfConverterID);lib/Target/NVPTX/NVPTXTargetMachine.cpp
335 addPass(&PHIEliminationID); 336 addPass(&TwoAddressInstructionPassID); 340 addPass(&ProcessImplicitDefsID); 341 addPass(&LiveVariablesID); 342 addPass(&MachineLoopInfoID); 343 addPass(&PHIEliminationID); 345 addPass(&TwoAddressInstructionPassID); 346 addPass(&RegisterCoalescerID); 349 if (addPass(&MachineSchedulerID)) 353 addPass(&StackSlotColoringID); 363 if (addPass(&EarlyTailDuplicateID)) 368 addPass(&OptimizePHIsID); 372 addPass(&StackColoringID); 376 addPass(&LocalStackSlotAllocationID); 382 addPass(&DeadMachineInstructionElimID); 391 addPass(&EarlyMachineLICMID); 392 addPass(&MachineCSEID); 394 addPass(&MachineSinkingID); 397 addPass(&PeepholeOptimizerID);lib/Target/PowerPC/PPCTargetMachine.cpp
440 addPass(&EarlyIfConverterID); 443 addPass(&MachineCombinerID); 479 addPass(&DeadMachineInstructionElimID); 496 addPass(&LiveVariablesID, false); 503 addPass(&MachinePipelinerID); 508 addPass(&IfConverterID);lib/Target/RISCV/RISCVTargetMachine.cpp
133 void RISCVPassConfig::addPreEmitPass() { addPass(&BranchRelaxationPassID); }
lib/Target/SystemZ/SystemZTargetMachine.cpp213 addPass(&EarlyIfConverterID); 230 addPass(&IfConverterID); 271 addPass(&PostMachineSchedulerID);lib/Target/X86/X86TargetMachine.cpp
466 addPass(&EarlyIfConverterID); 468 addPass(&MachineCombinerID); 483 addPass(&LiveRangeShrinkID);