reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
159 const MCInstrDesc &MCID = MI.getDesc(); 161 if (HasDef && !MI.getOperand(0).isReg()) 167 assert(findCommutedOpIndices(MI, CommutableOpIdx1, CommutableOpIdx2) && 170 assert(MI.getOperand(Idx1).isReg() && MI.getOperand(Idx2).isReg() && 170 assert(MI.getOperand(Idx1).isReg() && MI.getOperand(Idx2).isReg() && 173 Register Reg0 = HasDef ? MI.getOperand(0).getReg() : Register(); 174 Register Reg1 = MI.getOperand(Idx1).getReg(); 175 Register Reg2 = MI.getOperand(Idx2).getReg(); 176 unsigned SubReg0 = HasDef ? MI.getOperand(0).getSubReg() : 0; 177 unsigned SubReg1 = MI.getOperand(Idx1).getSubReg(); 178 unsigned SubReg2 = MI.getOperand(Idx2).getSubReg(); 179 bool Reg1IsKill = MI.getOperand(Idx1).isKill(); 180 bool Reg2IsKill = MI.getOperand(Idx2).isKill(); 181 bool Reg1IsUndef = MI.getOperand(Idx1).isUndef(); 182 bool Reg2IsUndef = MI.getOperand(Idx2).isUndef(); 183 bool Reg1IsInternal = MI.getOperand(Idx1).isInternalRead(); 184 bool Reg2IsInternal = MI.getOperand(Idx2).isInternalRead(); 188 ? MI.getOperand(Idx1).isRenamable() 191 ? MI.getOperand(Idx2).isRenamable() 196 MI.getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) { 201 MI.getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) { 210 MachineFunction &MF = *MI.getMF(); 211 CommutedMI = MF.CloneMachineInstr(&MI); 213 CommutedMI = &MI;