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References

lib/CodeGen/SelectionDAG/TargetLowering.cpp
 7175   EVT SetCCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
 7187       EVT ShiftAmtTy = getShiftAmountTy(VT, DAG.getDataLayout());
 7189       Result = DAG.getNode(ISD::SHL, dl, VT, LHS, ShiftAmt);
 7192                       dl, VT, Result, ShiftAmt),
 7198   EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), VT.getScalarSizeInBits() * 2);
 7199   if (VT.isVector())
 7201                               VT.getVectorNumElements());
 7208   if (isOperationLegalOrCustom(Ops[isSigned][0], VT)) {
 7209     BottomHalf = DAG.getNode(ISD::MUL, dl, VT, LHS, RHS);
 7210     TopHalf = DAG.getNode(Ops[isSigned][0], dl, VT, LHS, RHS);
 7211   } else if (isOperationLegalOrCustom(Ops[isSigned][1], VT)) {
 7212     BottomHalf = DAG.getNode(Ops[isSigned][1], dl, DAG.getVTList(VT, VT), LHS,
 7212     BottomHalf = DAG.getNode(Ops[isSigned][1], dl, DAG.getVTList(VT, VT), LHS,
 7219     BottomHalf = DAG.getNode(ISD::TRUNCATE, dl, VT, Mul);
 7220     SDValue ShiftAmt = DAG.getConstant(VT.getScalarSizeInBits(), dl,
 7222     TopHalf = DAG.getNode(ISD::TRUNCATE, dl, VT,
 7225     if (VT.isVector())
 7248       unsigned LoSize = VT.getSizeInBits();
 7250           DAG.getNode(ISD::SRA, dl, VT, LHS,
 7254           DAG.getNode(ISD::SRA, dl, VT, RHS,
 7258         HiLHS = DAG.getConstant(0, dl, VT);
 7259         HiRHS = DAG.getConstant(0, dl, VT);
 7296         VT.getScalarSizeInBits() - 1, dl,
 7298     SDValue Sign = DAG.getNode(ISD::SRA, dl, VT, BottomHalf, ShiftAmt);
 7302                             DAG.getConstant(0, dl, VT), ISD::SETNE);