reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
792 Regs.push_back(Reg + i); 825 P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT); 827 P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT, *Flag); 836 if (!Register::isVirtualRegister(Regs[Part + i]) || 841 FuncInfo.GetLiveOutRegInfo(Regs[Part+i]); 894 unsigned NumRegs = Regs.size(); 917 Part = DAG.getCopyToReg(Chain, dl, Regs[i], Parts[i]); 919 Part = DAG.getCopyToReg(Chain, dl, Regs[i], Parts[i], *Flag); 948 unsigned Flag = InlineAsm::getFlagWord(Code, Regs.size()); 951 else if (!Regs.empty() && Register::isVirtualRegister(Regs.front())) { 951 else if (!Regs.empty() && Register::isVirtualRegister(Regs.front())) { 958 const TargetRegisterClass *RC = MRI.getRegClass(Regs.front()); 969 assert(Regs.size() == RegVTs.size() && Regs.size() == ValueVTs.size() && 969 assert(Regs.size() == RegVTs.size() && Regs.size() == ValueVTs.size() && 974 Ops.push_back(DAG.getRegister(Regs[I], RegVTs[I])); 976 (Regs[I] != SP || 987 assert(Reg < Regs.size() && "Mismatch in # registers expected"); 988 unsigned TheReg = Regs[Reg++]; 1003 OutVec.push_back(std::make_pair(Regs[I], RegisterSize)); 8227 if (OpInfo.AssignedRegs.Regs.empty()) { 8374 if (OpInfo.AssignedRegs.Regs.empty()) { 8392 if (!OpInfo.AssignedRegs.Regs.empty()) 8458 if (OpInfo.AssignedRegs.Regs.empty())lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
853 Regs.append(RHS.Regs.begin(), RHS.Regs.end()); 853 Regs.append(RHS.Regs.begin(), RHS.Regs.end()); 853 Regs.append(RHS.Regs.begin(), RHS.Regs.end()); 854 RegCount.push_back(RHS.Regs.size());