reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/SelectionDAG.h

  820   SDValue getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT);

References

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

 1165   return DAG.getZeroExtendInReg(NewOp, DL, OldVT);
 9752         Op = DAG.getZeroExtendInReg(Op, SDLoc(N), MinVT.getScalarType());
 9764       SDValue And = DAG.getZeroExtendInReg(Op, SDLoc(N), MinVT.getScalarType());
10431     return DAG.getZeroExtendInReg(N0, SDLoc(N), EVT.getScalarType());
20117         Temp = DAG.getZeroExtendInReg(SCC, SDLoc(N2), VT);

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

  551     Value = DAG.getZeroExtendInReg(Value, dl, StVT);
  940         ValRes = DAG.getZeroExtendInReg(Result, dl, SrcVT.getScalarType());
 2778       RHS = DAG.getZeroExtendInReg(Node->getOperand(2), dl, AtomicType);
 2782       LHS = DAG.getZeroExtendInReg(Res, dl, AtomicType);
 2783       RHS = DAG.getZeroExtendInReg(Node->getOperand(2), dl, AtomicType);
 3364         DAG.getZeroExtendInReg(DAG.getZExtOrTrunc(Carry, dl, VT), dl, MVT::i1);

lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

  563         return DAG.getZeroExtendInReg(Res, dl,
  984   SDValue Ofl = DAG.getZeroExtendInReg(Res, dl, OVT.getScalarType());
 1569   return DAG.getZeroExtendInReg(Op, dl,
 3549     Hi = DAG.getZeroExtendInReg(Hi, dl,

lib/CodeGen/SelectionDAG/LegalizeTypes.h

  271     return DAG.getZeroExtendInReg(Op, dl, OldVT.getScalarType());
  285     return DAG.getZeroExtendInReg(Op, DL, OldVT.getScalarType());

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 1152   return getZeroExtendInReg(Op, DL, VT);

lib/CodeGen/SelectionDAG/TargetLowering.cpp

 1586           Op, TLO.DAG.getZeroExtendInReg(Op0, dl, ExVT.getScalarType()));

lib/Target/AMDGPU/AMDGPUISelLowering.cpp

 4023       return DAG.getZeroExtendInReg(BitsFrom, DL, SmallVT);

lib/Target/AMDGPU/R600ISelLowering.cpp

 1197   SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT);
 1430     Ret = DAG.getZeroExtendInReg(Ret, DL, MemEltVT);

lib/Target/AMDGPU/SIISelLowering.cpp

 7299     Cvt = DAG.getZeroExtendInReg(NewLoad, SL, TruncVT);

lib/Target/Hexagon/HexagonISelLowering.cpp

 2187       Vs[i] = DAG.getZeroExtendInReg(Vs[i], dl, MVT::i8);
 2342       ExtV = DAG.getZeroExtendInReg(VecV, dl, tyScalar(ValTy));

lib/Target/MSP430/MSP430ISelLowering.cpp

  966       Victim = DAG.getZeroExtendInReg(Victim, dl, MVT::i8);
  976                    : DAG.getZeroExtendInReg(Victim, dl, MVT::i8);

lib/Target/X86/X86ISelLowering.cpp

38839     return DAG.getZeroExtendInReg(Op, DL, NarrowVT.getScalarType());
42445     Res = DAG.getZeroExtendInReg(Res, dl, N0.getValueType().getScalarType());