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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
include/llvm/CodeGen/FastISel.h 476 unsigned constrainOperandRegClass(const MCInstrDesc &II, unsigned Op,
References
lib/CodeGen/SelectionDAG/FastISel.cpp 2052 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs());
2074 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs());
2075 Op1 = constrainOperandRegClass(II, Op1, II.getNumDefs() + 1);
2099 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs());
2100 Op1 = constrainOperandRegClass(II, Op1, II.getNumDefs() + 1);
2101 Op2 = constrainOperandRegClass(II, Op2, II.getNumDefs() + 2);
2125 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs());
2148 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs());
2192 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs());
2193 Op1 = constrainOperandRegClass(II, Op1, II.getNumDefs() + 1);
lib/Target/AArch64/AArch64FastISel.cpp 1141 constrainOperandRegClass(II, Addr.getReg(), II.getNumDefs()+Idx));
1143 constrainOperandRegClass(II, Addr.getOffsetReg(), II.getNumDefs()+Idx+1));
1344 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs());
1345 RHSReg = constrainOperandRegClass(II, RHSReg, II.getNumDefs() + 1);
1389 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs());
1431 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs());
1432 RHSReg = constrainOperandRegClass(II, RHSReg, II.getNumDefs() + 1);
1476 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs());
1477 RHSReg = constrainOperandRegClass(II, RHSReg, II.getNumDefs() + 1);
2102 SrcReg = constrainOperandRegClass(II, SrcReg, 0);
2103 AddrReg = constrainOperandRegClass(II, AddrReg, 1);
2171 SrcReg = constrainOperandRegClass(II, SrcReg, II.getNumDefs());
2408 SrcReg = constrainOperandRegClass(II, SrcReg, II.getNumDefs());
2540 = constrainOperandRegClass(II, CondReg, II.getNumDefs());
2558 AddrReg = constrainOperandRegClass(II, AddrReg, II.getNumDefs());
2810 CondReg = constrainOperandRegClass(II, CondReg, 1);
3275 unsigned Reg = constrainOperandRegClass(II, Addr.getReg(), 0);
3302 CallReg = constrainOperandRegClass(II, CallReg, 0);
5113 const unsigned AddrReg = constrainOperandRegClass(
5115 const unsigned DesiredReg = constrainOperandRegClass(
5117 const unsigned NewReg = constrainOperandRegClass(
lib/Target/ARM/ARMFastISel.cpp 309 Op0 = constrainOperandRegClass(II, Op0, 1);
332 Op0 = constrainOperandRegClass(II, Op0, 1);
333 Op1 = constrainOperandRegClass(II, Op1, 2);
360 Op0 = constrainOperandRegClass(II, Op0, 1);
524 ResultReg = constrainOperandRegClass(TII.get(ARM::LDRcp), ResultReg, 0);
601 DestReg = constrainOperandRegClass(TII.get(ARM::LDRcp), DestReg, 0);
677 ResultReg = constrainOperandRegClass(TII.get(Opc), ResultReg, 0);
1066 SrcReg = constrainOperandRegClass(TII.get(Opc), SrcReg, 1);
1140 SrcReg = constrainOperandRegClass(TII.get(StrOpc), SrcReg, 0);
1277 OpReg = constrainOperandRegClass(TII.get(TstOpc), OpReg, 0);
1314 CmpReg = constrainOperandRegClass(TII.get(TstOpc), CmpReg, 0);
1445 SrcReg1 = constrainOperandRegClass(II, SrcReg1, 0);
1447 SrcReg2 = constrainOperandRegClass(II, SrcReg2, 1);
1650 CondReg = constrainOperandRegClass(TII.get(TstOpc), CondReg, 0);
1670 Op2Reg = constrainOperandRegClass(TII.get(MovCCOpc), Op2Reg, 1);
1671 Op1Reg = constrainOperandRegClass(TII.get(MovCCOpc), Op1Reg, 2);
1679 Op1Reg = constrainOperandRegClass(TII.get(MovCCOpc), Op1Reg, 1);
1780 SrcReg1 = constrainOperandRegClass(TII.get(Opc), SrcReg1, 1);
1781 SrcReg2 = constrainOperandRegClass(TII.get(Opc), SrcReg2, 2);
2725 SrcReg = constrainOperandRegClass(TII.get(Opcode), SrcReg, 1 + setsCPSR);
2981 DestReg = constrainOperandRegClass(TII.get(Opc), DestReg, 0);
lib/Target/Mips/MipsFastISel.cpp 2138 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs());
2139 Op1 = constrainOperandRegClass(II, Op1, II.getNumDefs() + 1);
lib/Target/X86/X86FastISel.cpp 229 AM.IndexReg = constrainOperandRegClass(MIB->getDesc(), AM.IndexReg,
646 ValReg = constrainOperandRegClass(Desc, ValReg, Desc.getNumOperands() - 1);
3960 unsigned IndexReg = constrainOperandRegClass(Result->getDesc(),
3983 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs());
3984 Op1 = constrainOperandRegClass(II, Op1, II.getNumDefs() + 1);
3985 Op2 = constrainOperandRegClass(II, Op2, II.getNumDefs() + 2);
3986 Op3 = constrainOperandRegClass(II, Op3, II.getNumDefs() + 3);