|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 6862 if (VT.isVector()) {
6876 return DAG.getConstant(0, DL, VT);
6886 return DAG.FoldConstantArithmetic(ISD::XOR, DL, VT, N0C, N1C);
6890 return DAG.getNode(ISD::XOR, DL, VT, N1, N0);
6914 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC);
6930 return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, V);
6934 if (isOneConstant(N1) && VT == MVT::i1 && N0.hasOneUse() &&
6939 N00 = DAG.getNode(ISD::XOR, SDLoc(N00), VT, N00, N1); // N00 = ~N00
6940 N01 = DAG.getNode(ISD::XOR, SDLoc(N01), VT, N01, N1); // N01 = ~N01
6942 return DAG.getNode(NewOpcode, DL, VT, N00, N01);
6951 N00 = DAG.getNode(ISD::XOR, SDLoc(N00), VT, N00, N1); // N00 = ~N00
6952 N01 = DAG.getNode(ISD::XOR, SDLoc(N01), VT, N01, N1); // N01 = ~N01
6954 return DAG.getNode(NewOpcode, DL, VT, N00, N01);
6963 return DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(1),
6964 DAG.getAllOnesConstant(DL, VT));
6970 SDValue NotX = DAG.getNOT(SDLoc(X), X, VT);
6972 return DAG.getNode(ISD::AND, DL, VT, NotX, N1);
6978 unsigned BitWidth = VT.getScalarSizeInBits();
6990 SDValue Not = DAG.getNOT(DL, N0.getOperand(0), VT);
6991 return DAG.getNode(N0Opcode, DL, VT, Not, N0.getOperand(1));
6998 if (TLI.isOperationLegalOrCustom(ISD::ABS, VT)) {
7005 unsigned OpSizeInBits = VT.getScalarSizeInBits();
7008 return DAG.getNode(ISD::ABS, DL, VT, S0);
7015 return tryFoldToZero(DL, TLI, VT, DAG, LegalOperations);
7035 if (TLI.isOperationLegalOrCustom(ISD::ROTL, VT) && N0Opcode == ISD::SHL &&
7037 return DAG.getNode(ISD::ROTL, DL, VT, DAG.getConstant(~1, DL, VT),
7037 return DAG.getNode(ISD::ROTL, DL, VT, DAG.getConstant(~1, DL, VT),