reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 9709     return DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N), VT,
 9724                                  VT.getScalarSizeInBits()));
 9726       return DAG.getZExtOrTrunc(Op, SDLoc(N), VT);
 9748     if (SrcVT.bitsLT(VT) && VT.isVector()) {
 9748     if (SrcVT.bitsLT(VT) && VT.isVector()) {
 9750                                TLI.isOperationLegal(ISD::ZERO_EXTEND, VT))) {
 9754         SDValue ZExtOrTrunc = DAG.getZExtOrTrunc(Op, SDLoc(N), VT);
 9761     if (!LegalOperations || TLI.isOperationLegal(ISD::AND, VT)) {
 9762       SDValue Op = DAG.getAnyExtOrTrunc(N0.getOperand(0), SDLoc(N), VT);
 9779        !TLI.isZExtFree(N0.getValueType(), VT))) {
 9781     X = DAG.getAnyExtOrTrunc(X, SDLoc(X), VT);
 9783     Mask = Mask.zext(VT.getSizeInBits());
 9785     return DAG.getNode(ISD::AND, DL, VT,
 9786                        X, DAG.getConstant(Mask, DL, VT));
 9791           tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0,
 9796       tryToFoldExtOfMaskedLoad(DAG, TLI, VT, N, N0, ISD::ZEXTLOAD,
 9813       (!LegalOperations && TLI.isOperationLegal(N0.getOpcode(), VT))) {
 9816     if (TLI.isLoadExtLegal(ISD::ZEXTLOAD, VT, MemVT) &&
 9830         DoXform = ExtendUsesToFormExtLoad(VT, N0.getNode(), N0.getOperand(0),
 9833         SDValue ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, SDLoc(LN00), VT,
 9838         Mask = Mask.zext(VT.getSizeInBits());
 9840         SDValue And = DAG.getNode(N0.getOpcode(), DL, VT,
 9841                                   ExtLoad, DAG.getConstant(Mask, DL, VT));
 9871           DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::ZEXTLOAD))
 9879     if (!LegalOperations && VT.isVector() &&
 9891       SDValue VecOnes = DAG.getConstant(1, DL, VT);
 9892       if (VT.getSizeInBits() == N00VT.getSizeInBits()) {
 9894         SDValue VSetCC = DAG.getNode(ISD::SETCC, DL, VT, N0.getOperand(0),
 9896         return DAG.getNode(ISD::AND, DL, VT, VSetCC, VecOnes);
 9906       return DAG.getNode(ISD::AND, DL, VT, DAG.getSExtOrTrunc(VsetCC, DL, VT),
 9906       return DAG.getNode(ISD::AND, DL, VT, DAG.getSExtOrTrunc(VsetCC, DL, VT),
 9913             DL, N0.getOperand(0), N0.getOperand(1), DAG.getConstant(1, DL, VT),
 9914             DAG.getConstant(0, DL, VT),
 9938     if (VT.getSizeInBits() >= 256)
 9941     return DAG.getNode(N0.getOpcode(), DL, VT,
 9942                        DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0)),