reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 2865     if (ISD::isBuildVectorAllZeros(N1.getNode()))
 2871   if (N0 == N1)
 2874       DAG.isConstantIntBuildVectorOrConstantInt(N1)) {
 2877                                       N1.getNode());
 2883   ConstantSDNode *N1C = getAsNonOpaqueConstant(N1);
 2897     if (N1->getOpcode() == ISD::SRA || N1->getOpcode() == ISD::SRL) {
 2897     if (N1->getOpcode() == ISD::SRA || N1->getOpcode() == ISD::SRL) {
 2898       ConstantSDNode *ShiftAmt = isConstOrConstSplat(N1.getOperand(1));
 2900         auto NewSh = N1->getOpcode() == ISD::SRA ? ISD::SRL : ISD::SRA;
 2902           return DAG.getNode(NewSh, DL, VT, N1.getOperand(0), N1.getOperand(1));
 2902           return DAG.getNode(NewSh, DL, VT, N1.getOperand(0), N1.getOperand(1));
 2910     if (DAG.MaskedValueIsZero(N1, ~APInt::getSignMask(BitWidth))) {
 2917       return N1;
 2923     return DAG.getNode(ISD::XOR, DL, VT, N1, N0);
 2926   if (N1.getOpcode() == ISD::SUB && isNullOrNullSplat(N1.getOperand(0)))
 2926   if (N1.getOpcode() == ISD::SUB && isNullOrNullSplat(N1.getOperand(0)))
 2927     return DAG.getNode(ISD::ADD, DL, VT, N0, N1.getOperand(1));
 2930   if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(0))
 2930   if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(0))
 2931     return N1.getOperand(1);
 2934   if (N0.getOpcode() == ISD::ADD && N0.getOperand(0) == N1)
 2938   if (N0.getOpcode() == ISD::ADD && N0.getOperand(1) == N1)
 2943       isConstantOrConstantVector(N1, /* NoOpaques */ true) &&
 2946         ISD::SUB, DL, VT, N0.getOperand(1).getNode(), N1.getNode());
 2952   if (N1.getOpcode() == ISD::ADD) {
 2953     SDValue N11 = N1.getOperand(1);
 2959       return DAG.getNode(ISD::SUB, DL, VT, NewC, N1.getOperand(0));
 2965       isConstantOrConstantVector(N1, /* NoOpaques */ true) &&
 2968         ISD::ADD, DL, VT, N0.getOperand(1).getNode(), N1.getNode());
 2975       isConstantOrConstantVector(N1, /* NoOpaques */ true) &&
 2978         ISD::SUB, DL, VT, N0.getOperand(0).getNode(), N1.getNode());
 2987       N0.getOperand(1).getOperand(0) == N1)
 2993       N0.getOperand(1).getOperand(1) == N1)
 2999       N0.getOperand(1).getOperand(1) == N1)
 3004   if (N1.getOpcode() == ISD::SUB && N1.hasOneUse())
 3004   if (N1.getOpcode() == ISD::SUB && N1.hasOneUse())
 3006                        DAG.getNode(ISD::SUB, DL, VT, N1.getOperand(1),
 3007                                    N1.getOperand(0)));
 3010   if (N1.getOpcode() == ISD::MUL && N1.hasOneUse()) {
 3010   if (N1.getOpcode() == ISD::MUL && N1.hasOneUse()) {
 3011     if (N1.getOperand(0).getOpcode() == ISD::SUB &&
 3012         isNullOrNullSplat(N1.getOperand(0).getOperand(0))) {
 3014                                 N1.getOperand(0).getOperand(1),
 3015                                 N1.getOperand(1));
 3018     if (N1.getOperand(1).getOpcode() == ISD::SUB &&
 3019         isNullOrNullSplat(N1.getOperand(1).getOperand(0))) {
 3021                                 N1.getOperand(0),
 3022                                 N1.getOperand(1).getOperand(1));
 3030   if (N1.isUndef())
 3031     return N1;
 3039   if (SDValue V = foldAddSubMasked1(false, N0, N1, DAG, SDLoc(N)))
 3043   if (N0.hasOneUse() && N0.getOpcode() == ISD::SUB && isOneOrOneSplat(N1)) {
 3053   if (TLI.preferIncOfAddToSubOfNot(VT) && N1.hasOneUse() && isBitwiseNot(N1)) {
 3053   if (TLI.preferIncOfAddToSubOfNot(VT) && N1.hasOneUse() && isBitwiseNot(N1)) {
 3054     SDValue Add = DAG.getNode(ISD::ADD, DL, VT, N0, N1.getOperand(0));
 3062     SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), N1);
 3066   if (N1.hasOneUse() && N1.getOpcode() == ISD::ADD &&
 3066   if (N1.hasOneUse() && N1.getOpcode() == ISD::ADD &&
 3067       isConstantOrConstantVector(N1.getOperand(1), /*NoOpaques=*/true)) {
 3068     SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0, N1.getOperand(0));
 3069     return DAG.getNode(ISD::SUB, DL, VT, Sub, N1.getOperand(1));
 3075     SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), N1);
 3081     SDValue Add = DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(1), N1);
 3088   if (N1.getOpcode() == ISD::ZERO_EXTEND &&
 3089       N1.getOperand(0).getScalarValueSizeInBits() == 1 &&
 3092     SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, N1.getOperand(0));
 3098     if (N0.getOpcode() == ISD::XOR && N1.getOpcode() == ISD::SRA) {
 3100       SDValue S0 = N1.getOperand(0);
 3101       if ((X0 == S0 && X1 == N1) || (X0 == N1 && X1 == S0)) {
 3101       if ((X0 == S0 && X1 == N1) || (X0 == N1 && X1 == S0)) {
 3103         if (ConstantSDNode *C = isConstOrConstSplat(N1.getOperand(1)))
 3119       if (GlobalAddressSDNode *GB = dyn_cast<GlobalAddressSDNode>(N1))
 3126   if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) {
 3127     VTSDNode *TN = cast<VTSDNode>(N1.getOperand(1));
 3129       SDValue ZExt = DAG.getNode(ISD::AND, DL, VT, N1.getOperand(0),
 3137   if (!LegalOperations && N1.getOpcode() == ISD::SRL && N1.hasOneUse()) {
 3137   if (!LegalOperations && N1.getOpcode() == ISD::SRL && N1.hasOneUse()) {
 3138     SDValue ShAmt = N1.getOperand(1);
 3141         ShAmtC->getAPIntValue() == (N1.getScalarValueSizeInBits() - 1)) {
 3142       SDValue SRA = DAG.getNode(ISD::SRA, DL, VT, N1.getOperand(0), ShAmt);
 3150       SDValue X = N1;