reference, declarationdefinition
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reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/SelectionDAG/DAGCombiner.cpp
10540   EVT SrcVT = N0.getValueType();
10545     return N0;
10548   if (N0.getOpcode() == ISD::TRUNCATE)
10549     return DAG.getNode(ISD::TRUNCATE, SDLoc(N), VT, N0.getOperand(0));
10552   if (DAG.isConstantIntBuildVectorOrConstantInt(N0)) {
10553     SDValue C = DAG.getNode(ISD::TRUNCATE, SDLoc(N), VT, N0);
10559   if (N0.getOpcode() == ISD::ZERO_EXTEND ||
10560       N0.getOpcode() == ISD::SIGN_EXTEND ||
10561       N0.getOpcode() == ISD::ANY_EXTEND) {
10563     if (N0.getOperand(0).getValueType().bitsLT(VT))
10564       return DAG.getNode(N0.getOpcode(), SDLoc(N), VT, N0.getOperand(0));
10564       return DAG.getNode(N0.getOpcode(), SDLoc(N), VT, N0.getOperand(0));
10566     if (N0.getOperand(0).getValueType().bitsGT(VT))
10567       return DAG.getNode(ISD::TRUNCATE, SDLoc(N), VT, N0.getOperand(0));
10570     return N0.getOperand(0);
10587   if (N0.getOpcode() == ISD::EXTRACT_VECTOR_ELT &&
10588       LegalTypes && !LegalOperations && N0->hasOneUse() && VT != MVT::i1) {
10589     EVT VecTy = N0.getOperand(0).getValueType();
10590     EVT ExTy = N0.getValueType();
10599     SDValue EltNo = N0->getOperand(1);
10607                          DAG.getBitcast(NVT, N0.getOperand(0)),
10613   if (N0.getOpcode() == ISD::SELECT && N0.hasOneUse()) {
10613   if (N0.getOpcode() == ISD::SELECT && N0.hasOneUse()) {
10616       SDLoc SL(N0);
10617       SDValue Cond = N0.getOperand(0);
10618       SDValue TruncOp0 = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(1));
10619       SDValue TruncOp1 = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(2));
10625   if (N0.getOpcode() == ISD::SHL && N0.hasOneUse() &&
10625   if (N0.getOpcode() == ISD::SHL && N0.hasOneUse() &&
10628     SDValue Amt = N0.getOperand(1);
10635       SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(0));
10645   if (N0.getOpcode() == ISD::BUILD_VECTOR && !LegalOperations &&
10650     for (const SDValue &Op : N0->op_values()) {
10662       N0.getOpcode() == ISD::BITCAST && N0.hasOneUse() &&
10662       N0.getOpcode() == ISD::BITCAST && N0.hasOneUse() &&
10663       N0.getOperand(0).getOpcode() == ISD::BUILD_VECTOR &&
10664       N0.getOperand(0).hasOneUse()) {
10665     SDValue BuildVect = N0.getOperand(0);
10694         APInt::getLowBitsSet(N0.getValueSizeInBits(), VT.getSizeInBits());
10695     if (SDValue Shorter = DAG.GetDemandedBits(N0, Mask))
10701   if (!LegalTypes || TLI.isTypeDesirableForOp(N0.getOpcode(), VT)) {
10707     if (N0.hasOneUse() && ISD::isUNINDEXEDLoad(N0.getNode())) {
10707     if (N0.hasOneUse() && ISD::isUNINDEXEDLoad(N0.getNode())) {
10708       LoadSDNode *LN0 = cast<LoadSDNode>(N0);
10715         DAG.ReplaceAllUsesOfValueWith(N0.getValue(1), NewLoad.getValue(1));
10723   if (N0.getOpcode() == ISD::CONCAT_VECTORS && !LegalTypes) {
10729     for (unsigned i = 0, e = N0.getNumOperands(); i != e; ++i) {
10730       SDValue X = N0.getOperand(i);
10767   if (N0.getOpcode() == ISD::BITCAST && !VT.isVector()) {
10768     SDValue VecSrc = N0.getOperand(0);
10790   if ((N0.getOpcode() == ISD::ADDE || N0.getOpcode() == ISD::ADDCARRY) &&
10790   if ((N0.getOpcode() == ISD::ADDE || N0.getOpcode() == ISD::ADDCARRY) &&
10791       N0.hasOneUse() && !N0.getNode()->hasAnyUseOfValue(1) &&
10791       N0.hasOneUse() && !N0.getNode()->hasAnyUseOfValue(1) &&
10793       ((!LegalOperations && N0.getOpcode() == ISD::ADDCARRY) ||
10794        TLI.isOperationLegal(N0.getOpcode(), VT))) {
10796     auto X = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(0));
10797     auto Y = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(1));
10798     auto VTs = DAG.getVTList(VT, N0->getValueType(1));
10799     return DAG.getNode(N0.getOpcode(), SL, VTs, X, Y, N0.getOperand(2));
10799     return DAG.getNode(N0.getOpcode(), SL, VTs, X, Y, N0.getOperand(2));
10806   if (!LegalTypes && N0.getOpcode() == ISD::EXTRACT_SUBVECTOR) {
10807     SDValue N00 = N0.getOperand(0);
10813         return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N0->getOperand(0)), VT,
10814                            N00.getOperand(0), N0.getOperand(1));
10825   switch (N0.getOpcode()) {
10832     if (!LegalOperations && N0.hasOneUse() &&
10833         (isConstantOrConstantVector(N0.getOperand(0), true) ||
10834          isConstantOrConstantVector(N0.getOperand(1), true))) {
10838       if (VT.isScalarInteger() || TLI.isOperationLegal(N0.getOpcode(), VT)) {
10840         SDValue NarrowL = DAG.getNode(ISD::TRUNCATE, DL, VT, N0.getOperand(0));
10841         SDValue NarrowR = DAG.getNode(ISD::TRUNCATE, DL, VT, N0.getOperand(1));
10842         return DAG.getNode(N0.getOpcode(), DL, VT, NarrowL, NarrowR);