reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 2077   EVT VT = N0.getValueType();
 2087       return N0;
 2088     if (ISD::isBuildVectorAllZeros(N0.getNode()))
 2093   if (N0.isUndef())
 2094     return N0;
 2099   if (DAG.isConstantIntBuildVectorOrConstantInt(N0)) {
 2102       return DAG.getNode(ISD::ADD, DL, VT, N1, N0);
 2104     return DAG.FoldConstantArithmetic(ISD::ADD, DL, VT, N0.getNode(),
 2110     return N0;
 2114     if (N0.getOpcode() == ISD::SUB &&
 2115         isConstantOrConstantVector(N0.getOperand(1), /* NoOpaque */ true)) {
 2117                                                N0.getOperand(1).getNode());
 2119       return DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(0), Sub);
 2123     if (N0.getOpcode() == ISD::SUB &&
 2124         isConstantOrConstantVector(N0.getOperand(0), /* NoOpaque */ true)) {
 2126                                                N0.getOperand(0).getNode());
 2128       return DAG.getNode(ISD::SUB, DL, VT, Add, N0.getOperand(1));
 2135     if (N0.getOpcode() == ISD::SIGN_EXTEND && N0.hasOneUse() &&
 2135     if (N0.getOpcode() == ISD::SIGN_EXTEND && N0.hasOneUse() &&
 2137       SDValue X = N0.getOperand(0);
 2148     if (N0.getOpcode() == ISD::OR &&
 2149         isa<FrameIndexSDNode>(N0.getOperand(0)) &&
 2150         isa<ConstantSDNode>(N0.getOperand(1)) &&
 2151         DAG.haveNoCommonBitsSet(N0.getOperand(0), N0.getOperand(1))) {
 2151         DAG.haveNoCommonBitsSet(N0.getOperand(0), N0.getOperand(1))) {
 2152       SDValue Add0 = DAG.getNode(ISD::ADD, DL, VT, N1, N0.getOperand(1));
 2153       return DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(0), Add0);
 2161   if (!reassociationCanBreakAddressingModePattern(ISD::ADD, DL, N0, N1)) {
 2162     if (SDValue RADD = reassociateOps(ISD::ADD, DL, N0, N1, N->getFlags()))
 2166   if (N0.getOpcode() == ISD::SUB && isNullOrNullSplat(N0.getOperand(0)))
 2166   if (N0.getOpcode() == ISD::SUB && isNullOrNullSplat(N0.getOperand(0)))
 2167     return DAG.getNode(ISD::SUB, DL, VT, N1, N0.getOperand(1));
 2171     return DAG.getNode(ISD::SUB, DL, VT, N0, N1.getOperand(1));
 2174   if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(1))
 2178   if (N0.getOpcode() == ISD::SUB && N1 == N0.getOperand(1))
 2178   if (N0.getOpcode() == ISD::SUB && N1 == N0.getOperand(1))
 2179     return N0.getOperand(0);
 2182   if (N0.getOpcode() == ISD::SUB && N1.getOpcode() == ISD::SUB &&
 2183       N0.getOperand(0) == N1.getOperand(1))
 2185                        N0.getOperand(1));
 2188   if (N0.getOpcode() == ISD::SUB && N1.getOpcode() == ISD::SUB &&
 2189       N0.getOperand(1) == N1.getOperand(0))
 2190     return DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0),
 2195       N0 == N1.getOperand(1).getOperand(0))
 2201       N0 == N1.getOperand(1).getOperand(1))
 2208       N0 == N1.getOperand(0).getOperand(1))
 2213   if (N0.getOpcode() == ISD::SUB && N1.getOpcode() == ISD::SUB) {
 2214     SDValue N00 = N0.getOperand(0);
 2215     SDValue N01 = N0.getOperand(1);
 2221                          DAG.getNode(ISD::ADD, SDLoc(N0), VT, N00, N10),
 2226   if (N0.getOpcode() == ISD::UMAX && hasOperation(ISD::USUBSAT, VT)) {
 2231     if (ISD::matchBinaryPredicate(N0.getOperand(1), N1, MatchUSUBSAT,
 2233       return DAG.getNode(ISD::USUBSAT, DL, VT, N0.getOperand(0),
 2234                          N0.getOperand(1));
 2242     if (isBitwiseNot(N0))
 2244                          N0.getOperand(0));
 2247     if (N0.getOpcode() == ISD::ADD ||
 2248         N0.getOpcode() == ISD::UADDO ||
 2249         N0.getOpcode() == ISD::SADDO) {
 2252       if (isBitwiseNot(N0.getOperand(0))) {
 2253         A = N0.getOperand(1);
 2254         Xor = N0.getOperand(0);
 2255       } else if (isBitwiseNot(N0.getOperand(1))) {
 2256         A = N0.getOperand(0);
 2257         Xor = N0.getOperand(1);
 2268     if (!TLI.preferIncOfAddToSubOfNot(VT) && N0.hasOneUse() &&
 2269         N0.getOpcode() == ISD::ADD) {
 2270       SDValue Not = DAG.getNode(ISD::XOR, DL, VT, N0.getOperand(0),
 2272       return DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(1), Not);
 2277   if (N0.hasOneUse() && N0.getOpcode() == ISD::SUB &&
 2277   if (N0.hasOneUse() && N0.getOpcode() == ISD::SUB &&
 2279     SDValue Xor = DAG.getNode(ISD::XOR, DL, VT, N0.getOperand(1), N1);
 2280     return DAG.getNode(ISD::ADD, DL, VT, Xor, N0.getOperand(0));
 2283   if (SDValue Combined = visitADDLikeCommutative(N0, N1, N))
 2286   if (SDValue Combined = visitADDLikeCommutative(N1, N0, N))