reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/MachineVerifier.cpp
 1598     NumDefs = (MONum == 0 && MO->isReg()) ? NumDefs : 0;
 1601   if (MONum < NumDefs) {
 1602     const MCOperandInfo &MCOI = MCID.OpInfo[MONum];
 1604       report("Explicit definition must be a register", MO, MONum);
 1606       report("Explicit definition marked as use", MO, MONum);
 1608       report("Explicit definition marked as implicit", MO, MONum);
 1609   } else if (MONum < MCID.getNumOperands()) {
 1610     const MCOperandInfo &MCOI = MCID.OpInfo[MONum];
 1614         !(MI->isVariadic() && MONum == MCID.getNumOperands()-1)) {
 1616         report("Explicit operand marked as def", MO, MONum);
 1618         report("Explicit operand marked as implicit", MO, MONum);
 1621     int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO);
 1624         report("Tied use must be a register", MO, MONum);
 1626         report("Operand should be tied", MO, MONum);
 1627       else if (unsigned(TiedTo) != MI->findTiedOperandIdx(MONum))
 1628         report("Tied def doesn't match MCInstrDesc", MO, MONum);
 1638       report("Explicit operand should not be tied", MO, MONum);
 1642       report("Extra explicit operand on non-variadic instruction", MO, MONum);
 1651       checkLiveness(MO, MONum);
 1655       unsigned OtherIdx = MI->findTiedOperandIdx(MONum);
 1658         report("Must be tied to a register", MO, MONum);
 1660         report("Missing tie flags on tied operand", MO, MONum);
 1661       if (MI->findTiedOperandIdx(OtherIdx) != MONum)
 1662         report("Inconsistent tie links", MO, MONum);
 1663       if (MONum < MCID.getNumDefs()) {
 1667                    MO, MONum);
 1670             report("Explicit def should be tied to implicit use", MO, MONum);
 1678         MI->isRegTiedToDefOperand(MONum, &DefIdx) &&
 1680       report("Two-address instruction operands must be identical", MO, MONum);
 1687         report("Illegal subregister index for physical register", MO, MONum);
 1690       if (MONum < MCID.getNumOperands()) {
 1692               TII->getRegClass(MCID, MONum, TRI, *MF)) {
 1694             report("Illegal physical register for instruction", MO, MONum);
 1702           report("isRenamable set on reserved register", MO, MONum);
 1707         report("Use-reg is not IsDebug in a DBG_VALUE", MO, MONum);
 1719                  MO, MONum);
 1727                  MONum);
 1737                  MO, MONum);
 1745                  MONum);
 1753                  MONum);
 1761             MONum < MCID.getNumOperands() &&
 1762             TII->getRegClass(MCID, MONum, TRI, *MF)) {
 1764                  MONum);
 1767                         TII->getRegClass(MCID, MONum, TRI, *MF))
 1778           report("Invalid subregister index for virtual register", MO, MONum);
 1784           report("Invalid register class for subregister index", MO, MONum);
 1790       if (MONum < MCID.getNumOperands()) {
 1792               TII->getRegClass(MCID, MONum, TRI, *MF)) {
 1797               report("No largest legal super class exists.", MO, MONum);
 1802               report("No matching super-reg register class.", MO, MONum);
 1807             report("Illegal virtual register for instruction", MO, MONum);
 1824       report("PHI operand is not in the CFG", MO, MONum);
 1858         report("Instruction loads from dead spill slot", MO, MONum);
 1862         report("Instruction stores to dead spill slot", MO, MONum);