reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
314 MRI = &MF.getRegInfo(); 317 PreRegAlloc = MRI->isSSA(); 771 if (!MRI->hasOneDef(MO.getReg())) 775 for (MachineInstr &MI : MRI->use_instructions(MO.getReg())) { 860 const TargetRegisterClass *RC = MRI->getRegClass(Reg); 867 bool isKill = isOperandKill(MO, MRI); 982 !(HoistConstStores && isInvariantStore(I, TRI, MRI))) { 1023 if (!MRI->isConstantPhysReg(Reg) && 1041 assert(MRI->getVRegDef(Reg) && 1046 if (CurLoop->contains(MRI->getVRegDef(Reg))) 1066 for (MachineInstr &UseMI : MRI->use_instructions(Reg)) { 1094 if (MRI->use_nodbg_empty(Reg)) 1097 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(Reg)) { 1110 if (TII->hasHighOperandLatency(SchedModel, MRI, MI, DefIdx, UseMI, i)) 1204 if (HoistConstStores && isCopyFeedingInvariantStore(MI, MRI, TRI)) 1306 Register Reg = MRI->createVirtualRegister(RC); 1352 if (TII->produceSameValue(*MI, *PrevMI, (PreRegAlloc ? MRI : nullptr))) 1394 OrigRCs.push_back(MRI->getRegClass(DupReg)); 1396 if (!MRI->constrainRegClass(DupReg, MRI->getRegClass(Reg))) { 1396 if (!MRI->constrainRegClass(DupReg, MRI->getRegClass(Reg))) { 1399 MRI->setRegClass(Dup->getOperand(Defs[j]).getReg(), OrigRCs[j]); 1407 MRI->replaceRegWith(Reg, DupReg); 1408 MRI->clearKillFlags(DupReg); 1487 MRI->clearKillFlags(MO.getReg());