reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
  934   MachineInstrBuilder buildSelect(const DstOp &Res, const SrcOp &Tst,

References

lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  980       MIRBuilder.buildSelect(MI.getOperand(0).getReg(), CmpHEQ, CmpLU, CmpH);
 2236     MIRBuilder.buildSelect(BorrowOut, LHS_EQ_RHS, BorrowIn, LHS_ULT_RHS);
 2676     MIRBuilder.buildSelect(DstReg, CondTy.isVector() ? Src0Regs[i] : CondReg,
 3194     auto Lo = MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL);
 3195     auto Hi = MIRBuilder.buildSelect(
 3196         HalfTy, IsZero, InH, MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL));
 3222     auto Lo = MIRBuilder.buildSelect(
 3223         HalfTy, IsZero, InL, MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL));
 3225     auto Hi = MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL);
 3656     auto Select = MIRBuilder.buildSelect(NarrowTy,
 3662     auto Select = MIRBuilder.buildSelect(
 3703       MIRBuilder.buildSelect(MI.getOperand(0).getReg(), MIBICmp, MIBLen,
 3754       MIRBuilder.buildSelect(MI.getOperand(0).getReg(), MIBICmp, MIBLen,
 3818   auto E = MIRBuilder.buildSelect(S32, NotZero, Sub, Zero32);
 3838   auto Select0 = MIRBuilder.buildSelect(S32, TCmp, VTrunc1, Zero32);
 3839   auto R = MIRBuilder.buildSelect(S32, RCmp, One, Select0);
 3897     MIRBuilder.buildSelect(Dst, SignNotZero, RNeg, R);
 3940   MIRBuilder.buildSelect(Dst, FCMP, FPTOSI, Res);
 3971   MIRBuilder.buildSelect(Dst, Cmp, Src0, Src1);
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
 1275     B.buildSelect(Dst, CmpRes, PtrLo32, SegmentNull.getReg(0));
 1310   B.buildSelect(Dst, CmpRes, BuildPtr, FlatNull.getReg(0));
 1339   B.buildSelect(MI.getOperand(0).getReg(), Cond, Src, Tmp2);
 1365   auto Add = B.buildSelect(S64, And, One, Zero);
 1429   auto Tmp1 = B.buildSelect(S64, ExpLt0, SignBit64, Tmp0);
 1430   B.buildSelect(MI.getOperand(0).getReg(), ExpGt51, Src, Tmp1);
 1989   auto Sel = B.buildSelect(S32, CmpRes, C1, C2, Flags);
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
 1371     B.buildSelect(DefRegs[0], Src0Regs[0], Src1Regs[0], Src2Regs[0]);
 1372     B.buildSelect(DefRegs[1], Src0Regs[0], Src1Regs[1], Src2Regs[1]);
 1558         B.buildSelect(DefRegs[0], SrcReg, True, False);
 1561         auto Sel = B.buildSelect(SelType, SrcReg, True, False);
 1565         B.buildSelect(DstReg, SrcReg, True, False);