reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/GlobalISel/LegalizerHelper.cpp
 1911   MIRBuilder.setInstr(MI);
 1913   switch(MI.getOpcode()) {
 1919     MIRBuilder.buildInstr(MI.getOpcode() == G_SREM ? G_SDIV : G_UDIV)
 1921         .addUse(MI.getOperand(1).getReg())
 1922         .addUse(MI.getOperand(2).getReg());
 1925     MIRBuilder.buildMul(ProdReg, QuotReg, MI.getOperand(2).getReg());
 1926     MIRBuilder.buildSub(MI.getOperand(0).getReg(), MI.getOperand(1).getReg(),
 1926     MIRBuilder.buildSub(MI.getOperand(0).getReg(), MI.getOperand(1).getReg(),
 1928     MI.eraseFromParent();
 1933     return lowerSADDO_SSUBO(MI);
 1938     Register Res = MI.getOperand(0).getReg();
 1939     Register Overflow = MI.getOperand(1).getReg();
 1940     Register LHS = MI.getOperand(2).getReg();
 1941     Register RHS = MI.getOperand(3).getReg();
 1945     unsigned Opcode = MI.getOpcode() == TargetOpcode::G_SMULO
 1972     MI.eraseFromParent();
 1980     Register Res = MI.getOperand(0).getReg();
 2002     Register SubByReg = MI.getOperand(1).getReg();
 2005                           MI.getFlags());
 2006     MI.eraseFromParent();
 2015     Register Res = MI.getOperand(0).getReg();
 2016     Register LHS = MI.getOperand(1).getReg();
 2017     Register RHS = MI.getOperand(2).getReg();
 2020     MIRBuilder.buildInstr(TargetOpcode::G_FADD, {Res}, {LHS, Neg}, MI.getFlags());
 2021     MI.eraseFromParent();
 2025     return lowerFMad(MI);
 2027     Register OldValRes = MI.getOperand(0).getReg();
 2028     Register SuccessRes = MI.getOperand(1).getReg();
 2029     Register Addr = MI.getOperand(2).getReg();
 2030     Register CmpVal = MI.getOperand(3).getReg();
 2031     Register NewVal = MI.getOperand(4).getReg();
 2033                                   **MI.memoperands_begin());
 2035     MI.eraseFromParent();
 2042     Register DstReg = MI.getOperand(0).getReg();
 2043     Register PtrReg = MI.getOperand(1).getReg();
 2045     auto &MMO = **MI.memoperands_begin();
 2048       if (MI.getOpcode() == TargetOpcode::G_LOAD) {
 2095         MI.eraseFromParent();
 2099       MI.eraseFromParent();
 2107       switch (MI.getOpcode()) {
 2120       MI.eraseFromParent();
 2133     Register SrcReg = MI.getOperand(0).getReg();
 2134     Register PtrReg = MI.getOperand(1).getReg();
 2136     MachineMemOperand &MMO = **MI.memoperands_begin();
 2168     MI.eraseFromParent();
 2176     return lowerBitCount(MI, TypeIdx, Ty);
 2178     Register Res = MI.getOperand(0).getReg();
 2179     Register CarryOut = MI.getOperand(1).getReg();
 2180     Register LHS = MI.getOperand(2).getReg();
 2181     Register RHS = MI.getOperand(3).getReg();
 2186     MI.eraseFromParent();
 2190     Register Res = MI.getOperand(0).getReg();
 2191     Register CarryOut = MI.getOperand(1).getReg();
 2192     Register LHS = MI.getOperand(2).getReg();
 2193     Register RHS = MI.getOperand(3).getReg();
 2194     Register CarryIn = MI.getOperand(4).getReg();
 2204     MI.eraseFromParent();
 2208     Register Res = MI.getOperand(0).getReg();
 2209     Register BorrowOut = MI.getOperand(1).getReg();
 2210     Register LHS = MI.getOperand(2).getReg();
 2211     Register RHS = MI.getOperand(3).getReg();
 2216     MI.eraseFromParent();
 2220     Register Res = MI.getOperand(0).getReg();
 2221     Register BorrowOut = MI.getOperand(1).getReg();
 2222     Register LHS = MI.getOperand(2).getReg();
 2223     Register RHS = MI.getOperand(3).getReg();
 2224     Register BorrowIn = MI.getOperand(4).getReg();
 2238     MI.eraseFromParent();
 2242     return lowerUITOFP(MI, TypeIdx, Ty);
 2244     return lowerSITOFP(MI, TypeIdx, Ty);
 2246     return lowerFPTOUI(MI, TypeIdx, Ty);
 2251     return lowerMinMax(MI, TypeIdx, Ty);
 2253     return lowerFCopySign(MI, TypeIdx, Ty);
 2256     return lowerFMinNumMaxNum(MI);
 2258     return lowerUnmergeValues(MI);
 2260     assert(MI.getOperand(2).isImm() && "Expected immediate");
 2261     int64_t SizeInBits = MI.getOperand(2).getImm();
 2263     Register DstReg = MI.getOperand(0).getReg();
 2264     Register SrcReg = MI.getOperand(1).getReg();
 2271     MI.eraseFromParent();
 2275     return lowerShuffleVector(MI);
 2277     return lowerDynStackAlloc(MI);
 2279     return lowerExtract(MI);
 2281     return lowerInsert(MI);