reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/Hexagon/HexagonGenDAGISel.inc
72698 uint64_t V = N->getZExtValue();return isUInt<32>(V) && V <= 31;
72704 uint64_t V = N->getZExtValue();return isUInt<32>(V) && V > 31;
72716 uint64_t V = N->getZExtValue();return isUInt<32>(V) && V > 32;
gen/lib/Target/Mips/MipsGenDAGISel.inc
30154     return isPowerOf2_32(Imm) && isUInt<32>(Imm);
30290 return isUInt<32>(Imm) && Imm == 7;
30295 return isUInt<32>(Imm) && Imm == 15;
30300 return isUInt<32>(Imm) && Imm == 31;
30443   return isUInt<32>(Val) && !(Val & 0xffff);
30450  return isUInt<32>(N->getZExtValue()); 
gen/lib/Target/Mips/MipsGenGlobalISel.inc
  519     return isUInt<32>(Imm) && Imm == 15;
  524     return isUInt<32>(Imm) && Imm == 31;
  529     return isUInt<32>(Imm) && Imm == 7;
gen/lib/Target/PowerPC/PPCGenDAGISel.inc
44285   return isUInt<32>(Imm);
gen/lib/Target/Sparc/SparcGenDAGISel.inc
 3580  return isUInt<32>(N->getZExtValue()); 
gen/lib/Target/SystemZ/SystemZGenDAGISel.inc
30094   return isUInt<32>(N->getZExtValue());
30343   return isUInt<32>(-N->getSExtValue());
gen/lib/Target/X86/X86GenDAGISel.inc
253988   return isMask_64(Imm) && !isUInt<32>(Imm);
254007   return !isUInt<32>(Imm) && !isInt<32>(Imm) && isPowerOf2_64(~Imm);
254014   return isUInt<32>(Imm) && isInt<8>(static_cast<int32_t>(Imm));
254020  return isUInt<32>(Imm); 
gen/lib/Target/X86/X86GenFastISel.inc
   16   return isMask_64(Imm) && !isUInt<32>(Imm);
   21   return !isUInt<32>(Imm) && !isInt<32>(Imm) && isPowerOf2_64(~Imm);
gen/lib/Target/X86/X86GenGlobalISel.inc
  635   return isMask_64(Imm) && !isUInt<32>(Imm);
  649   return !isUInt<32>(Imm) && !isInt<32>(Imm) && isPowerOf2_64(~Imm);
  682      return isUInt<32>(Imm); 
  688   return isUInt<32>(Imm) && isInt<8>(static_cast<int32_t>(Imm));
include/llvm/Support/MathExtras.h
  398   return isUInt<N + S>(x) && (x % (UINT64_C(1) << S) == 0);
lib/MC/MCDwarf.cpp
 1941     assert(isUInt<32>(AddrDelta));
lib/MC/MCParser/AsmParser.cpp
 3232   if (!isUInt<32>(FillExpr) && FillSize > 4)
lib/MC/MCParser/ELFAsmParser.cpp
  477   if (!isUInt<32>(UniqueID) || UniqueID == ~0U)
lib/MC/WinCOFFObjectWriter.cpp
  830   if (Now < 0 || !isUInt<32>(Now))
lib/Target/AArch64/AArch64ISelLowering.cpp
 6161       if (!isUInt<32>(CVal))
lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
  407   assert(isUInt<32>(PI.ScratchSize));
  408   assert(isUInt<32>(PI.ComputePGMRSrc1));
  409   assert(isUInt<32>(PI.ComputePGMRSrc2));
  931   if (!isUInt<32>(ProgInfo.ScratchSize)) {
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
 1350     if (isUInt<32>(C1->getZExtValue()))
 1763   if (!isUInt<32>(EncodedOffset) || !isUInt<32>(ByteOffset))
 1763   if (!isUInt<32>(EncodedOffset) || !isUInt<32>(ByteOffset))
 1766   if (Gen == AMDGPUSubtarget::SEA_ISLANDS && isUInt<32>(EncodedOffset)) {
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
 1909   if (!isUInt<32>(EncodedImm))
 1932   if (!GEPInfo.Imm || !isUInt<32>(GEPInfo.Imm))
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
 2160   if (!isUInt<32>(RegLo) || !isUInt<32>(RegHi) || RegLo > RegHi)
 2160   if (!isUInt<32>(RegLo) || !isUInt<32>(RegHi) || RegLo > RegHi)
 3710       if (!isUInt<sizeof(KD.group_segment_fixed_size) * CHAR_BIT>(Val))
 3714       if (!isUInt<sizeof(KD.private_segment_fixed_size) * CHAR_BIT>(Val))
 5976   return isImm() && !isUInt<8>(getImm()) && isUInt<32>(getImm());
lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
  452     assert(isUInt<32>(Imm) || Imm == 0x3fc45f306dc9c882);
lib/Target/AMDGPU/SIFrameLowering.cpp
 1116     assert(isUInt<32>(Amount) && "exceeded stack address space size");
lib/Target/AMDGPU/SIISelLowering.cpp
 1174       if (!isUInt<32>(AM.BaseOffs / 4))
lib/Target/AMDGPU/SIShrinkInstructions.cpp
   88                                isUInt<32>(MovSrc.getImm()))) {
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
 2626     if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) {
 2685   if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) {
 4536   bool Is32Bit = isInt<32>(ImmValue) || (!isGP64bit() && isUInt<32>(ImmValue));
lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
  383       if (isUInt<32>(getImm()) && isInt<26>(static_cast<int32_t>(getImm())))
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
 2116       bool Use32BitInsts = isUInt<32>(Mask);
 2121       bool NeedsRotate = VRI.RLAmt || (VRI.Repl32 && !isUInt<32>(Mask));
 2171       if (VRI.RLAmt || (VRI.Repl32 && !isUInt<32>(Mask)))
 2318       bool Use32BitInsts = isUInt<32>(Mask);
 3751         if (isUInt<32>(Imm)) {
lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  378            (isRV64() || (isInt<32>(Imm) || isUInt<32>(Imm)));
lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
  173   if (!isUInt<N>(Imm))
  181   if (!isUInt<N>(Imm))
  252   assert(isUInt<N>(Imm) && "Invalid PC-relative offset");
lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
   68   assert(isUInt<N>(Value) && "Invalid uimm argument");
lib/Target/SystemZ/SystemZISelLowering.cpp
  790   return isInt<32>(Imm) || isUInt<32>(Imm);
  795   return isUInt<32>(Imm) || isUInt<32>(-Imm);
  795   return isUInt<32>(Imm) || isUInt<32>(-Imm);
lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
   53     if (isUInt<32>(Imm.getZExtValue()))
  104       if (isUInt<32>(Imm.getZExtValue()))
  112       if (isUInt<32>(Imm.getZExtValue()))
  115       if (isUInt<32>(-Imm.getSExtValue()))
  130       if (isUInt<32>(Imm.getZExtValue()))
  143       if (isUInt<32>(~Imm.getZExtValue()))
  205       if (isUInt<32>(Imm.getZExtValue()))
  207       if (isUInt<32>(-Imm.getSExtValue()))
lib/Target/X86/AsmParser/X86AsmParserCommon.h
   23          (isUInt<32>(Value) && isInt<8>(static_cast<int32_t>(Value)));
lib/Target/X86/X86FastISel.cpp
 3722     if (isUInt<32>(Imm))
lib/Target/X86/X86FrameLowering.cpp
 1266       if (isUInt<32>(Alloc)) {
lib/Target/X86/X86ISelDAGToDAG.cpp
 1625       isUInt<32>(Mask)) {
 2363     if (!isUInt<32>(ImmVal))
 3744       isUInt<32>(Val)) {
 3775       if (NVT == MVT::i64 && !isUInt<32>(Val) && isUInt<32>(ShiftedVal))
 3775       if (NVT == MVT::i64 && !isUInt<32>(Val) && isUInt<32>(ShiftedVal))
 3788       if (NVT == MVT::i64 && !isUInt<32>(Val) && isUInt<32>(ShiftedVal))
 3788       if (NVT == MVT::i64 && !isUInt<32>(Val) && isUInt<32>(ShiftedVal))
 5069       } else if (isUInt<32>(Mask) && N0.getValueType() != MVT::i16 &&
lib/Target/X86/X86ISelLowering.cpp
20403       if ((!isUInt<32>(AndRHSVal) || (OptForSize && !isUInt<8>(AndRHSVal))) &&
lib/Target/X86/X86TargetTransformInfo.cpp
 3001     if (Idx == 1 && Imm.getBitWidth() == 64 && isUInt<32>(Imm.getZExtValue()))
tools/llvm-cvtres/llvm-cvtres.cpp
   94   if (Now < 0 || !isUInt<32>(Now))