|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenCallingConv.inc 201 if (LocVT == MVT::v64i32 ||
225 if (LocVT == MVT::v64i32 ||
341 if (LocVT == MVT::v64i32 ||
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc26015 /* 49948*/ /*SwitchType*/ 10, MVT::v64i32,// ->49960
26018 MVT::v64i32, 2/*#Ops*/, 0, 1,
26558 /* 51005*/ /*SwitchType*/ 10, MVT::v64i32,// ->51017
26561 MVT::v64i32, 2/*#Ops*/, 0, 1,
41164 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
41202 MVT::v64i32, 4/*#Ops*/, 0, 1, 2, 3,
41240 MVT::v64i32, 4/*#Ops*/, 0, 1, 2, 3,
41276 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
41312 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
41350 MVT::v64i32, 4/*#Ops*/, 0, 1, 2, 3,
41386 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
41498 MVT::v64i32, 4/*#Ops*/, 0, 1, 2, 3,
41566 MVT::v64i32, 0/*#Ops*/,
41742 MVT::v64i32, 2/*#Ops*/, 0, 1,
42084 MVT::v64i32, 2/*#Ops*/, 0, 1,
42138 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
42192 MVT::v64i32, 2/*#Ops*/, 0, 1,
42380 MVT::v64i32, 2/*#Ops*/, 0, 1,
42460 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
42594 MVT::v64i32, 2/*#Ops*/, 0, 1,
42620 MVT::v64i32, 2/*#Ops*/, 0, 1,
42802 MVT::v64i32, 1/*#Ops*/, 0,
42852 MVT::v64i32, 1/*#Ops*/, 0,
42954 MVT::v64i32, 2/*#Ops*/, 0, 1,
43236 MVT::v64i32, 1/*#Ops*/, 0,
43316 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
43368 MVT::v64i32, 2/*#Ops*/, 0, 1,
43396 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
43448 MVT::v64i32, 2/*#Ops*/, 0, 1,
43656 MVT::v64i32, 2/*#Ops*/, 0, 1,
43680 MVT::v64i32, 1/*#Ops*/, 0,
43706 MVT::v64i32, 2/*#Ops*/, 0, 1,
43870 MVT::v64i32, 2/*#Ops*/, 0, 1,
43950 MVT::v64i32, 2/*#Ops*/, 0, 1,
43976 MVT::v64i32, 2/*#Ops*/, 0, 1,
44084 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
44248 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
44274 MVT::v64i32, 2/*#Ops*/, 0, 1,
44298 MVT::v64i32, 1/*#Ops*/, 0,
44352 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
44538 MVT::v64i32, 2/*#Ops*/, 0, 1,
44564 MVT::v64i32, 2/*#Ops*/, 0, 1,
44590 MVT::v64i32, 2/*#Ops*/, 0, 1,
44616 MVT::v64i32, 2/*#Ops*/, 0, 1,
44752 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
44806 MVT::v64i32, 2/*#Ops*/, 0, 1,
44886 MVT::v64i32, 2/*#Ops*/, 0, 1,
44966 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
45014 MVT::v64i32, 1/*#Ops*/, 0,
45096 MVT::v64i32, 2/*#Ops*/, 0, 1,
45148 MVT::v64i32, 2/*#Ops*/, 0, 1,
45254 MVT::v64i32, 2/*#Ops*/, 0, 1,
45306 MVT::v64i32, 2/*#Ops*/, 0, 1,
45388 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
45442 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
45546 MVT::v64i32, 2/*#Ops*/, 0, 1,
45812 MVT::v64i32, 2/*#Ops*/, 0, 1,
45918 MVT::v64i32, 2/*#Ops*/, 0, 1,
45994 MVT::v64i32, 2/*#Ops*/, 0, 1,
46048 MVT::v64i32, 2/*#Ops*/, 0, 1,
46104 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
46158 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
46210 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
46238 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
46266 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
46372 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
46398 MVT::v64i32, 2/*#Ops*/, 0, 1,
46552 MVT::v64i32, 2/*#Ops*/, 0, 1,
46604 MVT::v64i32, 2/*#Ops*/, 0, 1,
46948 MVT::v64i32, 2/*#Ops*/, 0, 1,
47024 MVT::v64i32, 2/*#Ops*/, 0, 1,
47160 MVT::v64i32, 2/*#Ops*/, 0, 1,
47322 MVT::v64i32, 2/*#Ops*/, 0, 1,
47346 MVT::v64i32, 1/*#Ops*/, 0,
47370 MVT::v64i32, 1/*#Ops*/, 0,
47398 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
47612 MVT::v64i32, 2/*#Ops*/, 0, 1,
48198 MVT::v64i32, 2/*#Ops*/, 0, 1,
48278 MVT::v64i32, 2/*#Ops*/, 0, 1,
48302 MVT::v64i32, 1/*#Ops*/, 0,
48354 MVT::v64i32, 2/*#Ops*/, 0, 1,
48486 MVT::v64i32, 4/*#Ops*/, 0, 1, 2, 3,
48542 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
48652 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
48678 MVT::v64i32, 2/*#Ops*/, 0, 1,
48812 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
48920 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
49024 MVT::v64i32, 2/*#Ops*/, 0, 1,
49102 MVT::v64i32, 2/*#Ops*/, 0, 1,
49156 MVT::v64i32, 2/*#Ops*/, 0, 1,
49264 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
49290 MVT::v64i32, 2/*#Ops*/, 0, 1,
49504 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
49532 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
49610 MVT::v64i32, 2/*#Ops*/, 0, 1,
49662 MVT::v64i32, 2/*#Ops*/, 0, 1,
49816 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
49868 MVT::v64i32, 2/*#Ops*/, 0, 1,
49948 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
50266 MVT::v64i32, 2/*#Ops*/, 0, 1,
50452 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
50530 MVT::v64i32, 2/*#Ops*/, 0, 1,
50688 MVT::v64i32, 2/*#Ops*/, 0, 1,
50852 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
50880 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
51040 MVT::v64i32, 2/*#Ops*/, 0, 1,
51150 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
51206 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
51354 MVT::v64i32, 2/*#Ops*/, 0, 1,
51434 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
52257 /* 98550*/ /*SwitchType*/ 11, MVT::v64i32,// ->98563
52260 MVT::v64i32, 3/*#Ops*/, 0, 1, 2,
52572 /* 99238*/ /*SwitchType*/ 11, MVT::v64i32,// ->99251
52576 MVT::v64i32, 1/*#Ops*/, 0,
66978 /*128606*/ /*SwitchType*/ 5, MVT::v64i32,// ->128613
66991 /*128625*/ /*SwitchType*/ 5, MVT::v64i32,// ->128632
66998 /*128634*/ OPC_CheckChild0Type, MVT::v64i32,
67251 /*129212*/ /*SwitchType*/ 11, MVT::v64i32,// ->129225
67255 MVT::v64i32, 1/*#Ops*/, 0,
69771 /*135032*/ OPC_CheckType, MVT::v64i32,
69786 MVT::v64i32, 5/*#Ops*/, 2, 4, 5, 7, 8,
70217 /*136166*/ OPC_CheckType, MVT::v64i32,
70227 MVT::v64i32, 5/*#Ops*/, 1, 2, 3, 4, 5,
70336 /*136429*/ OPC_CheckType, MVT::v64i32,
70339 MVT::v64i32, 0/*#Ops*/,
70430 /*136634*/ /*SwitchType*/ 25, MVT::v64i32,// ->136661
70438 MVT::v64i32, 5/*#Ops*/, 2, 1, 3, 0, 4,
71117 /*138235*/ /*SwitchType*/ 8, MVT::v64i32,// ->138245
71120 MVT::v64i32, 0/*#Ops*/,
71360 /*138785*/ /*SwitchType*/ 36, MVT::v64i32,// ->138823
71370 MVT::v64i32, 5/*#Ops*/, 1, 2, 3, 4, 5,
71693 /*139501*/ /*SwitchType*/ 38, MVT::v64i32,// ->139541
71704 MVT::v64i32, 1/*#Ops*/, 5,
71710 /*139545*/ OPC_CheckType, MVT::v64i32,
71716 MVT::v64i32, 1/*#Ops*/, 2,
71915 /*140047*/ /*SwitchType*/ 38, MVT::v64i32,// ->140087
71926 MVT::v64i32, 1/*#Ops*/, 5,
71932 /*140091*/ OPC_CheckType, MVT::v64i32,
71938 MVT::v64i32, 1/*#Ops*/, 2,
gen/lib/Target/Hexagon/HexagonGenRegisterInfo.inc 2348 /* 41 */ MVT::v256i8, MVT::v128i16, MVT::v64i32, MVT::Other,
include/llvm/Support/MachineValueType.h 383 SimpleTy == MVT::v64i32 || SimpleTy == MVT::v32i64);
483 case v64i32:
571 case v64i32:
808 case v64i32:
946 if (NumElements == 64) return MVT::v64i32;
lib/CodeGen/ValueTypes.cpp 176 case MVT::v64i32: return "v64i32";
320 case MVT::v64i32: return VectorType::get(Type::getInt32Ty(Context), 64);
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 19 static const MVT LegalW128[] = { MVT::v256i8, MVT::v128i16, MVT::v64i32 };
49 addRegisterClass(MVT::v64i32, &Hexagon::HvxWRRegClass);
utils/TableGen/CodeGenTarget.cpp 116 case MVT::v64i32: return "MVT::v64i32";