|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc23747 /* 45715*/ /*SwitchType*/ 35, MVT::v64i1,// ->45752
23751 MVT::v64i1, 2/*#Ops*/, 0, 1,
23757 MVT::v64i1, 2/*#Ops*/, 0, 1,
23763 MVT::v64i1, 2/*#Ops*/, 0, 1,
23830 /* 45879*/ /*SwitchType*/ 24, MVT::v64i1,// ->45905
23834 MVT::v64i1, 2/*#Ops*/, 1, 0,
23840 MVT::v64i1, 2/*#Ops*/, 1, 0,
24008 /* 46216*/ OPC_CheckType, MVT::v64i1,
24012 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
24018 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
24025 /* 46248*/ OPC_CheckType, MVT::v64i1,
24029 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
24035 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
24042 /* 46280*/ OPC_CheckType, MVT::v64i1,
24046 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
24052 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
24063 /* 46318*/ OPC_CheckType, MVT::v64i1,
24066 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
24072 /* 46335*/ OPC_CheckType, MVT::v64i1,
24075 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
24081 /* 46352*/ OPC_CheckType, MVT::v64i1,
24084 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
24275 /* 46706*/ OPC_CheckType, MVT::v64i1,
24279 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
24285 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
24293 /* 46739*/ OPC_CheckType, MVT::v64i1,
24297 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
24303 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
24311 /* 46772*/ OPC_CheckType, MVT::v64i1,
24315 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
24321 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
24333 /* 46811*/ OPC_CheckType, MVT::v64i1,
24336 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
24343 /* 46829*/ OPC_CheckType, MVT::v64i1,
24346 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
24353 /* 46847*/ OPC_CheckType, MVT::v64i1,
24356 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
24620 /* 47343*/ /*SwitchType*/ 35, MVT::v64i1,// ->47380
24624 MVT::v64i1, 2/*#Ops*/, 0, 1,
24630 MVT::v64i1, 2/*#Ops*/, 0, 1,
24636 MVT::v64i1, 2/*#Ops*/, 0, 1,
28047 /* 54192*/ /*SwitchType*/ 35, MVT::v64i1,// ->54229
28051 MVT::v64i1, 2/*#Ops*/, 0, 1,
28057 MVT::v64i1, 2/*#Ops*/, 0, 1,
28063 MVT::v64i1, 2/*#Ops*/, 0, 1,
28130 /* 54356*/ /*SwitchType*/ 24, MVT::v64i1,// ->54382
28134 MVT::v64i1, 2/*#Ops*/, 1, 0,
28140 MVT::v64i1, 2/*#Ops*/, 1, 0,
28308 /* 54693*/ OPC_CheckType, MVT::v64i1,
28312 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
28318 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
28325 /* 54725*/ OPC_CheckType, MVT::v64i1,
28329 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
28335 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
28342 /* 54757*/ OPC_CheckType, MVT::v64i1,
28346 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
28352 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
28363 /* 54795*/ OPC_CheckType, MVT::v64i1,
28366 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
28372 /* 54812*/ OPC_CheckType, MVT::v64i1,
28375 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
28381 /* 54829*/ OPC_CheckType, MVT::v64i1,
28384 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
28575 /* 55183*/ OPC_CheckType, MVT::v64i1,
28579 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
28585 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
28593 /* 55216*/ OPC_CheckType, MVT::v64i1,
28597 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
28603 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
28611 /* 55249*/ OPC_CheckType, MVT::v64i1,
28615 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
28621 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
28633 /* 55288*/ OPC_CheckType, MVT::v64i1,
28636 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
28643 /* 55306*/ OPC_CheckType, MVT::v64i1,
28646 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
28653 /* 55324*/ OPC_CheckType, MVT::v64i1,
28656 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
28920 /* 55820*/ /*SwitchType*/ 35, MVT::v64i1,// ->55857
28924 MVT::v64i1, 2/*#Ops*/, 0, 1,
28930 MVT::v64i1, 2/*#Ops*/, 0, 1,
28936 MVT::v64i1, 2/*#Ops*/, 0, 1,
30611 /* 59204*/ OPC_CheckType, MVT::v64i1,
30617 MVT::v64i1, 2/*#Ops*/, 0, 1,
30623 MVT::v64i1, 2/*#Ops*/, 0, 1,
30632 MVT::v64i1, 2/*#Ops*/, 0, 1,
30638 MVT::v64i1, 2/*#Ops*/, 0, 1,
30647 MVT::v64i1, 2/*#Ops*/, 0, 1,
30653 MVT::v64i1, 2/*#Ops*/, 0, 1,
30661 /* 59293*/ OPC_CheckType, MVT::v64i1,
30666 MVT::v64i1, 2/*#Ops*/, 0, 1,
30673 MVT::v64i1, 2/*#Ops*/, 0, 1,
30680 MVT::v64i1, 2/*#Ops*/, 0, 1,
54297 /*102588*/ /*SwitchType*/ 32, MVT::v64i1,// ->102622
54301 MVT::v64i1, 1/*#Ops*/, 0,
54307 MVT::v64i1, 1/*#Ops*/, 0,
54313 MVT::v64i1, 1/*#Ops*/, 0,
54363 /*102698*/ /*SwitchType*/ 22, MVT::v64i1,// ->102722
54367 MVT::v64i1, 1/*#Ops*/, 0,
54373 MVT::v64i1, 1/*#Ops*/, 0,
54435 /*102825*/ /*SwitchType*/ 32, MVT::v64i1,// ->102859
54439 MVT::v64i1, 1/*#Ops*/, 0,
54445 MVT::v64i1, 1/*#Ops*/, 0,
54451 MVT::v64i1, 1/*#Ops*/, 0,
54529 /*102990*/ OPC_CheckType, MVT::v64i1,
54533 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
54539 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
54546 /*103022*/ OPC_CheckType, MVT::v64i1,
54550 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
54556 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
54563 /*103054*/ OPC_CheckType, MVT::v64i1,
54567 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
54573 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
54584 /*103092*/ OPC_CheckType, MVT::v64i1,
54587 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
54593 /*103109*/ OPC_CheckType, MVT::v64i1,
54596 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
54602 /*103126*/ OPC_CheckType, MVT::v64i1,
54605 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
54782 /*103458*/ /*SwitchType*/ 22, MVT::v64i1,// ->103482
54786 MVT::v64i1, 1/*#Ops*/, 0,
54792 MVT::v64i1, 1/*#Ops*/, 0,
54868 /*103607*/ OPC_CheckType, MVT::v64i1,
54872 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
54878 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
54886 /*103640*/ OPC_CheckType, MVT::v64i1,
54890 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
54896 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
54904 /*103673*/ OPC_CheckType, MVT::v64i1,
54908 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
54914 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
54926 /*103712*/ OPC_CheckType, MVT::v64i1,
54929 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
54936 /*103730*/ OPC_CheckType, MVT::v64i1,
54939 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
54946 /*103748*/ OPC_CheckType, MVT::v64i1,
54949 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
55214 /*104245*/ /*SwitchType*/ 35, MVT::v64i1,// ->104282
55218 MVT::v64i1, 2/*#Ops*/, 0, 1,
55224 MVT::v64i1, 2/*#Ops*/, 0, 1,
55230 MVT::v64i1, 2/*#Ops*/, 0, 1,
64028 /*122860*/ /*SwitchType*/ 81, MVT::v64i1,// ->122943
64037 MVT::v64i1, 2/*#Ops*/, 0, 2,
64046 MVT::v64i1, 2/*#Ops*/, 0, 2,
64057 MVT::v64i1, 2/*#Ops*/, 0, 2,
68595 /*132843*/ /*SwitchType*/ 48|128,3/*432*/, MVT::v64i1,// ->133278
69402 /*134297*/ /*SwitchType*/ 46, MVT::v64i1,// ->134345
69518 /*134512*/ /*SwitchType*/ 46, MVT::v64i1,// ->134560
69630 /*134716*/ OPC_CheckChild0Type, MVT::v64i1,
71381 /*138838*/ /*SwitchType*/ 29, MVT::v64i1,// ->138869
71385 MVT::v64i1, 0/*#Ops*/,
71391 MVT::v64i1, 0/*#Ops*/,
71397 MVT::v64i1, 0/*#Ops*/,
71443 /*138937*/ /*SwitchType*/ 29, MVT::v64i1,// ->138968
71447 MVT::v64i1, 0/*#Ops*/,
71453 MVT::v64i1, 0/*#Ops*/,
71459 MVT::v64i1, 0/*#Ops*/,
71945 /*140123*/ OPC_CheckChild0Type, MVT::v64i1,
71981 /*140266*/ /*SwitchType*/ 47|128,3/*431*/, MVT::v64i1,// ->140700
72016 MVT::v64i1, 2/*#Ops*/, 16, 18,
72051 MVT::v64i1, 2/*#Ops*/, 16, 18,
72086 MVT::v64i1, 2/*#Ops*/, 16, 18,
gen/lib/Target/Hexagon/HexagonGenRegisterInfo.inc 2342 /* 12 */ MVT::v512i1, MVT::v64i1, MVT::v32i1, MVT::v16i1, MVT::Other,
2343 /* 17 */ MVT::v1024i1, MVT::v128i1, MVT::v64i1, MVT::v32i1, MVT::Other,
gen/lib/Target/X86/X86GenCallingConv.inc 531 if (LocVT == MVT::v64i1) {
849 if (LocVT == MVT::v64i1) {
1529 if (LocVT == MVT::v64i1) {
1918 if (LocVT == MVT::v64i1) {
2381 if (LocVT == MVT::v64i1) {
2768 if (LocVT == MVT::v64i1) {
3086 if (LocVT == MVT::v64i1) {
3659 if (LocVT == MVT::v64i1) {
3859 if (LocVT == MVT::v64i1) {
gen/lib/Target/X86/X86GenDAGISel.inc 7158 /* 15364*/ OPC_CheckChild1Type, MVT::v64i1,
8424 /* 18133*/ OPC_CheckChild3Type, MVT::v64i1,
23232 /* 47248*/ OPC_CheckType, MVT::v64i1,
23238 MVT::v64i1, 8/*#Ops*/, 0, 2, 5, 6, 7, 8, 9, 10,
23258 /* 47300*/ OPC_CheckType, MVT::v64i1,
23264 MVT::v64i1, 8/*#Ops*/, 0, 4, 5, 6, 7, 8, 9, 10,
23388 /* 47554*/ OPC_CheckType, MVT::v64i1,
23394 MVT::v64i1, 8/*#Ops*/, 0, 2, 5, 6, 7, 8, 9, 10,
23414 /* 47606*/ OPC_CheckType, MVT::v64i1,
23420 MVT::v64i1, 8/*#Ops*/, 0, 4, 5, 6, 7, 8, 9, 10,
25081 /* 50874*/ OPC_CheckType, MVT::v64i1,
25086 MVT::v64i1, 7/*#Ops*/, 0, 1, 4, 5, 6, 7, 8,
25154 /* 51011*/ OPC_CheckType, MVT::v64i1,
25160 MVT::v64i1, 8/*#Ops*/, 4, 1, 5, 6, 7, 8, 9, 10,
25167 /* 51041*/ OPC_CheckType, MVT::v64i1,
25173 MVT::v64i1, 8/*#Ops*/, 4, 1, 5, 6, 7, 8, 9, 10,
25876 /* 52490*/ OPC_CheckType, MVT::v64i1,
25881 MVT::v64i1, 7/*#Ops*/, 3, 0, 4, 5, 6, 7, 8,
25952 /* 52634*/ OPC_CheckType, MVT::v64i1,
25958 MVT::v64i1, 8/*#Ops*/, 4, 3, 5, 6, 7, 8, 9, 10,
25965 /* 52664*/ OPC_CheckType, MVT::v64i1,
25971 MVT::v64i1, 8/*#Ops*/, 4, 3, 5, 6, 7, 8, 9, 10,
28903 /* 59345*/ /*SwitchType*/ 10, MVT::v64i1,// ->59357
28906 MVT::v64i1, 2/*#Ops*/, 0, 1,
29377 /* 60142*/ OPC_CheckType, MVT::v64i1,
29380 MVT::v64i1, 2/*#Ops*/, 0, 1,
29393 /* 60167*/ OPC_CheckType, MVT::v64i1,
29396 MVT::v64i1, 2/*#Ops*/, 1, 0,
29405 /* 60185*/ OPC_CheckType, MVT::v64i1,
29408 MVT::v64i1, 2/*#Ops*/, 1, 0,
29949 /* 61559*/ OPC_CheckType, MVT::v64i1,
29953 MVT::v64i1, 4/*#Ops*/, 0, 2, 3, 4,
29959 /* 61580*/ OPC_CheckType, MVT::v64i1,
29963 MVT::v64i1, 4/*#Ops*/, 0, 2, 3, 4,
30274 /* 62196*/ OPC_CheckType, MVT::v64i1,
30277 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
30317 /* 62273*/ OPC_CheckType, MVT::v64i1,
30321 MVT::v64i1, 4/*#Ops*/, 3, 1, 2, 4,
30328 /* 62295*/ OPC_CheckType, MVT::v64i1,
30332 MVT::v64i1, 4/*#Ops*/, 3, 1, 2, 4,
30667 /* 62935*/ OPC_CheckType, MVT::v64i1,
30670 MVT::v64i1, 3/*#Ops*/, 2, 0, 1,
30954 MVT::v64i1, 2/*#Ops*/, 0, 4, // Results = #5
30967 MVT::v64i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
30980 MVT::v64i1, 2/*#Ops*/, 0, 4, // Results = #5
30993 MVT::v64i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31013 MVT::v64i1, 2/*#Ops*/, 0, 4, // Results = #5
31026 MVT::v64i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31039 MVT::v64i1, 2/*#Ops*/, 0, 4, // Results = #5
31052 MVT::v64i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31440 MVT::v64i1, 2/*#Ops*/, 3, 4, // Results = #5
31453 MVT::v64i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31467 MVT::v64i1, 2/*#Ops*/, 3, 4, // Results = #5
31480 MVT::v64i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31501 MVT::v64i1, 2/*#Ops*/, 3, 4, // Results = #5
31514 MVT::v64i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31528 MVT::v64i1, 2/*#Ops*/, 3, 4, // Results = #5
31541 MVT::v64i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31868 /* 66133*/ /*SwitchType*/ 10, MVT::v64i1,// ->66145
31871 MVT::v64i1, 2/*#Ops*/, 0, 1,
33863 /* 70416*/ /*SwitchType*/ 12, MVT::v64i1,// ->70430
33866 MVT::v64i1, 3/*#Ops*/, 0, 1, 2,
41922 /* 87621*/ /*SwitchType*/ 13, MVT::v64i1,// ->87636
41926 MVT::v64i1, 2/*#Ops*/, 0, 1,
42046 /* 87911*/ /*SwitchType*/ 31, MVT::v64i1,// ->87944
42055 MVT::v64i1, 2/*#Ops*/, 3, 4,
47380 /* 99291*/ /*SwitchType*/ 10, MVT::v64i1,// ->99303
47383 MVT::v64i1, 2/*#Ops*/, 0, 1,
48689 /*102308*/ /*SwitchType*/ 10, MVT::v64i1,// ->102320
48692 MVT::v64i1, 2/*#Ops*/, 0, 1,
48928 /*102670*/ OPC_CheckType, MVT::v64i1,
48931 MVT::v64i1, 2/*#Ops*/, 0, 1,
48941 /*102689*/ OPC_CheckType, MVT::v64i1,
48944 MVT::v64i1, 2/*#Ops*/, 0, 1,
48956 /*102712*/ OPC_CheckType, MVT::v64i1,
48959 MVT::v64i1, 2/*#Ops*/, 0, 1,
48973 /*102738*/ OPC_CheckType, MVT::v64i1,
48976 MVT::v64i1, 2/*#Ops*/, 1, 0,
48985 /*102756*/ OPC_CheckType, MVT::v64i1,
48988 MVT::v64i1, 2/*#Ops*/, 1, 0,
49416 /*103775*/ /*SwitchType*/ 9, MVT::v64i1,// ->103786
49419 MVT::v64i1, 1/*#Ops*/, 0,
49531 /*104032*/ /*SwitchType*/ 9, MVT::v64i1,// ->104043
49534 MVT::v64i1, 1/*#Ops*/, 0,
50312 /*106164*/ /*SwitchType*/ 10, MVT::v64i1,// ->106176
50315 MVT::v64i1, 2/*#Ops*/, 0, 1,
52038 /*110101*/ /*SwitchType*/ 17, MVT::v64i1,// ->110120
52043 MVT::v64i1, 5/*#Ops*/, 2, 3, 4, 5, 6,
55826 /*118313*/ OPC_CheckChild0Type, MVT::v64i1,
56115 /*118878*/ OPC_CheckChild0Type, MVT::v64i1,
56468 /*119571*/ /*SwitchType*/ 13, MVT::v64i1,// ->119586
56472 MVT::v64i1, 2/*#Ops*/, 0, 1,
57379 /*121381*/ OPC_CheckChild0Type, MVT::v64i1,
58290 /*123051*/ OPC_CheckChild0Type, MVT::v64i1,
58325 /*123113*/ OPC_CheckChild0Type, MVT::v64i1,
118073 /*243957*/ OPC_CheckChild0Type, MVT::v64i1,
147095 MVT::v64i1, 2/*#Ops*/, 0, 2, // Results = #3
148336 MVT::v64i1, 2/*#Ops*/, 0, 6, // Results = #7
187696 MVT::v64i1, 2/*#Ops*/, 0, 2, // Results = #3
188418 MVT::v64i1, 2/*#Ops*/, 0, 6, // Results = #7
188441 /*380753*/ OPC_CheckChild0Type, MVT::v64i1,
194156 /*392428*/ /*SwitchType*/ 13, MVT::v64i1,// ->392443
194160 MVT::v64i1, 2/*#Ops*/, 0, 1,
194190 /*392499*/ /*SwitchType*/ 13, MVT::v64i1,// ->392514
194194 MVT::v64i1, 2/*#Ops*/, 0, 1,
194217 /*392555*/ /*SwitchType*/ 13, MVT::v64i1,// ->392570
194221 MVT::v64i1, 2/*#Ops*/, 0, 1,
194230 /*392580*/ OPC_CheckType, MVT::v64i1,
194234 MVT::v64i1, 2/*#Ops*/, 0, 1,
194263 /*392650*/ /*SwitchType*/ 13, MVT::v64i1,// ->392665
194267 MVT::v64i1, 2/*#Ops*/, 0, 1,
194297 /*392721*/ /*SwitchType*/ 13, MVT::v64i1,// ->392736
194301 MVT::v64i1, 2/*#Ops*/, 0, 1,
194650 /*393566*/ /*SwitchType*/ 59, MVT::v64i1,// ->393627
194657 MVT::v64i1, 2/*#Ops*/, 1, 2,
194664 MVT::v64i1, 2/*#Ops*/, 0, 1, // Results = #2
194667 MVT::v64i1, 2/*#Ops*/, 2, 3, // Results = #4
194670 MVT::v64i1, 2/*#Ops*/, 4, 5,
194687 /*393656*/ /*SwitchType*/ 20, MVT::v64i1,// ->393678
194693 MVT::v64i1, 2/*#Ops*/, 1, 2,
194700 /*393684*/ OPC_CheckType, MVT::v64i1,
194706 MVT::v64i1, 2/*#Ops*/, 1, 2,
194751 /*393824*/ /*SwitchType*/ 35, MVT::v64i1,// ->393861
194755 MVT::v64i1, 2/*#Ops*/, 0, 1, // Results = #2
194758 MVT::v64i1, 2/*#Ops*/, 2, 3, // Results = #4
194761 MVT::v64i1, 2/*#Ops*/, 4, 5,
194807 /*393980*/ /*SwitchType*/ 35, MVT::v64i1,// ->394017
194811 MVT::v64i1, 2/*#Ops*/, 0, 1, // Results = #2
194814 MVT::v64i1, 2/*#Ops*/, 2, 3, // Results = #4
194817 MVT::v64i1, 2/*#Ops*/, 4, 5,
194863 /*394136*/ /*SwitchType*/ 35, MVT::v64i1,// ->394173
194867 MVT::v64i1, 2/*#Ops*/, 0, 1, // Results = #2
194870 MVT::v64i1, 2/*#Ops*/, 2, 3, // Results = #4
194873 MVT::v64i1, 2/*#Ops*/, 4, 5,
194920 /*394261*/ /*SwitchType*/ 11, MVT::v64i1,// ->394274
194923 MVT::v64i1, 2/*#Ops*/, 0, 1,
194954 /*394333*/ /*SwitchType*/ 11, MVT::v64i1,// ->394346
194957 MVT::v64i1, 2/*#Ops*/, 0, 1,
194982 /*394392*/ /*SwitchType*/ 11, MVT::v64i1,// ->394405
194985 MVT::v64i1, 2/*#Ops*/, 0, 1,
195004 /*394438*/ /*SwitchType*/ 11, MVT::v64i1,// ->394451
195007 MVT::v64i1, 2/*#Ops*/, 0, 1,
195020 /*394471*/ /*SwitchType*/ 11, MVT::v64i1,// ->394484
195023 MVT::v64i1, 2/*#Ops*/, 0, 1,
195030 /*394490*/ OPC_CheckType, MVT::v64i1,
195033 MVT::v64i1, 2/*#Ops*/, 0, 1,
206457 /*418082*/ OPC_CheckChild2Type, MVT::v64i1,
207501 /*420432*/ OPC_CheckType, MVT::v64i1,
207507 MVT::v64i1, 7/*#Ops*/, 1, 4, 5, 6, 7, 8, 9,
207526 /*420480*/ OPC_CheckType, MVT::v64i1,
207532 MVT::v64i1, 7/*#Ops*/, 3, 4, 5, 6, 7, 8, 9,
207651 /*420720*/ OPC_CheckType, MVT::v64i1,
207657 MVT::v64i1, 7/*#Ops*/, 1, 4, 5, 6, 7, 8, 9,
207676 /*420768*/ OPC_CheckType, MVT::v64i1,
207682 MVT::v64i1, 7/*#Ops*/, 3, 4, 5, 6, 7, 8, 9,
209781 /*425028*/ OPC_CheckType, MVT::v64i1,
209784 MVT::v64i1, 1/*#Ops*/, 0,
209806 MVT::v64i1, 1/*#Ops*/, 3, // Results = #4
209832 MVT::v64i1, 1/*#Ops*/, 3, // Results = #4
210035 /*425577*/ OPC_CheckType, MVT::v64i1,
210041 MVT::v64i1, 3/*#Ops*/, 1, 2, 3,
210049 MVT::v64i1, 3/*#Ops*/, 1, 2, 3,
210091 MVT::v64i1, 3/*#Ops*/, 5, 8, 9, // Results = #10
210112 MVT::v64i1, 3/*#Ops*/, 5, 8, 9, // Results = #10
210157 MVT::v64i1, 3/*#Ops*/, 5, 8, 9, // Results = #10
210178 MVT::v64i1, 3/*#Ops*/, 5, 8, 9, // Results = #10
226639 /*462137*/ OPC_CheckType, MVT::v64i1,
226644 MVT::v64i1, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
226649 /*462159*/ OPC_CheckType, MVT::v64i1,
226652 MVT::v64i1, 2/*#Ops*/, 0, 1,
228594 /*466530*/ OPC_CheckChild0Type, MVT::v64i1,
231082 /*471464*/ /*SwitchType*/ 10, MVT::v64i1,// ->471476
231085 MVT::v64i1, 2/*#Ops*/, 0, 1,
231113 /*471524*/ /*SwitchType*/ 10, MVT::v64i1,// ->471536
231116 MVT::v64i1, 2/*#Ops*/, 0, 1,
231369 /*471960*/ /*SwitchType*/ 8, MVT::v64i1,// ->471970
231372 MVT::v64i1, 0/*#Ops*/,
231530 /*472254*/ /*SwitchType*/ 8, MVT::v64i1,// ->472264
231533 MVT::v64i1, 0/*#Ops*/,
231640 /*472474*/ /*SwitchType*/ 10, MVT::v64i1,// ->472486
231643 MVT::v64i1, 2/*#Ops*/, 0, 1,
231665 /*472522*/ /*SwitchType*/ 13, MVT::v64i1,// ->472537
231670 MVT::v64i1, 2/*#Ops*/, 1, 0,
gen/lib/Target/X86/X86GenFastISel.inc 333 case MVT::v64i1: return fastEmit_ISD_ANY_EXTEND_MVT_v64i1_r(RetVT, Op0, Op0IsKill);
1642 case MVT::v64i1: return fastEmit_ISD_SIGN_EXTEND_MVT_v64i1_r(RetVT, Op0, Op0IsKill);
6233 if (RetVT.SimpleTy != MVT::v64i1)
6406 case MVT::v64i1: return fastEmit_ISD_AND_MVT_v64i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
7240 if (RetVT.SimpleTy != MVT::v64i1)
7413 case MVT::v64i1: return fastEmit_ISD_OR_MVT_v64i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
8866 if (RetVT.SimpleTy != MVT::v64i1)
9039 case MVT::v64i1: return fastEmit_ISD_XOR_MVT_v64i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
10880 if (RetVT.SimpleTy != MVT::v64i1)
10893 case MVT::v64i1: return fastEmit_X86ISD_KADD_MVT_v64i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
10941 case MVT::v64i1: return fastEmit_X86ISD_KORTEST_MVT_v64i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
10989 case MVT::v64i1: return fastEmit_X86ISD_KTEST_MVT_v64i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
13004 if (RetVT.SimpleTy != MVT::v64i1)
gen/lib/Target/X86/X86GenRegisterInfo.inc 4486 /* 36 */ MVT::v64i1, MVT::Other,
include/llvm/Support/MachineValueType.h 342 return (SimpleTy == MVT::v64i1 || SimpleTy == MVT::v8i8 ||
434 case v64i1:
568 case v64i1:
732 case v64i1:
909 if (NumElements == 64) return MVT::v64i1;
lib/CodeGen/ValueTypes.cpp 145 case MVT::v64i1: return "v64i1";
289 case MVT::v64i1: return VectorType::get(Type::getInt1Ty(Context), 64);
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 41 addRegisterClass(MVT::v64i1, &Hexagon::HvxQRRegClass);
51 addRegisterClass(MVT::v64i1, &Hexagon::HvxQRRegClass);
lib/Target/X86/X86FrameLowering.cpp 2039 VT = STI.hasBWI() ? MVT::v64i1 : MVT::v16i1;
2120 VT = STI.hasBWI() ? MVT::v64i1 : MVT::v16i1;
2201 VT = STI.hasBWI() ? MVT::v64i1 : MVT::v16i1;
lib/Target/X86/X86ISelDAGToDAG.cpp 4224 case MVT::v64i1: return X86::VK64RegClassID;
lib/Target/X86/X86ISelLowering.cpp 1592 addRegisterClass(MVT::v64i1, &X86::VK64RegClass);
1594 for (auto VT : { MVT::v32i1, MVT::v64i1 }) {
1614 setOperationAction(ISD::CONCAT_VECTORS, MVT::v64i1, Custom);
1616 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v64i1, Custom);
2429 (ValVT == MVT::v64i1 && ValLoc == MVT::i64)) {
2571 assert(VA.getValVT() == MVT::v64i1 &&
2739 assert(VA.getValVT() == MVT::v64i1 &&
2778 return DAG.getNode(ISD::CONCAT_VECTORS, Dl, MVT::v64i1, Lo, Hi);
2792 if (ValVT == MVT::v64i1) {
2872 assert(VA.getValVT() == MVT::v64i1 &&
3225 VA.getValVT() == MVT::v64i1 &&
3266 else if (RegVT == MVT::v64i1)
3820 assert(VA.getValVT() == MVT::v64i1 &&
8548 if (VT == MVT::v64i1 && !Subtarget.is64Bit()) {
8553 DstVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v64i1, ImmL, ImmH);
16952 case MVT::v64i1:
20959 !(Subtarget.hasBWI() && (VT == MVT::v32i1 || VT == MVT::v64i1)))
20975 if (Subtarget.hasBWI() && (VT == MVT::v32i1 || VT == MVT::v64i1))
21275 if (VT == MVT::v64i1 && !Subtarget.is64Bit()) {
22597 assert(MaskVT == MVT::v64i1 && "Expected v64i1 mask!");
22609 return DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v64i1, Lo, Hi);
25567 SDValue CMP = DAG.getSetCC(dl, MVT::v64i1, Zeros, R, ISD::SETGT);
26764 if (SrcVT == MVT::i64 && DstVT == MVT::v64i1) {
26774 return DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v64i1, Lo, Hi);
28443 if (SrcVT == MVT::v64i1 && DstVT == MVT::i64 && Subtarget.hasBWI()) {
35285 case MVT::v64i1:
40535 VT == MVT::v64i1) && VT == StVT && TLI.isTypeLegal(VT) &&
40538 if (VT == MVT::v64i1 && !Subtarget.is64Bit()) {
42712 CmpVT = MVT::v64i1;
42788 EVT KRegVT = CmpVT == MVT::v64i1 ? MVT::i64 :
lib/Target/X86/X86TargetTransformInfo.cpp 1290 { ISD::SIGN_EXTEND, MVT::v64i8, MVT::v64i1, 1 },
1298 { ISD::ZERO_EXTEND, MVT::v64i8, MVT::v64i1, 2 },
utils/TableGen/CodeGenTarget.cpp 86 case MVT::v64i1: return "MVT::v64i1";