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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc17125 /* 32763*/ OPC_CheckChild1Type, MVT::v512i1,
41593 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
41599 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
41935 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
41941 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
42337 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
42343 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
42524 MVT::v512i1, 2/*#Ops*/, 0, 1,
42530 MVT::v512i1, 2/*#Ops*/, 0, 1,
42707 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
42713 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
42735 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
42741 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
42812 MVT::v512i1, 2/*#Ops*/, 0, 1,
42818 MVT::v512i1, 2/*#Ops*/, 0, 1,
43406 MVT::v512i1, 2/*#Ops*/, 0, 1,
43412 MVT::v512i1, 2/*#Ops*/, 0, 1,
43590 MVT::v512i1, 2/*#Ops*/, 0, 1,
43596 MVT::v512i1, 2/*#Ops*/, 0, 1,
43986 MVT::v512i1, 2/*#Ops*/, 0, 1,
43992 MVT::v512i1, 2/*#Ops*/, 0, 1,
44123 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
44129 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
44308 MVT::v512i1, 2/*#Ops*/, 0, 1,
44314 MVT::v512i1, 2/*#Ops*/, 0, 1,
44362 MVT::v512i1, 2/*#Ops*/, 0, 1,
44368 MVT::v512i1, 2/*#Ops*/, 0, 1,
44495 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
44501 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
44627 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
44633 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
45025 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
45031 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
45212 MVT::v512i1, 2/*#Ops*/, 0, 1,
45218 MVT::v512i1, 2/*#Ops*/, 0, 1,
45317 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
45323 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
45453 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
45459 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
46059 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
46065 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
46509 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
46515 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
46639 MVT::v512i1, 1/*#Ops*/, 0,
46645 MVT::v512i1, 1/*#Ops*/, 0,
46741 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
46747 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
46878 MVT::v512i1, 2/*#Ops*/, 0, 1,
46884 MVT::v512i1, 2/*#Ops*/, 0, 1,
46905 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
46911 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47035 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47041 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47063 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47069 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47117 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47123 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47199 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47205 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47279 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47285 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47462 MVT::v512i1, 2/*#Ops*/, 0, 1,
47468 MVT::v512i1, 2/*#Ops*/, 0, 1,
47679 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47685 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47733 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47739 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47839 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47845 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47866 MVT::v512i1, 2/*#Ops*/, 0, 1,
47872 MVT::v512i1, 2/*#Ops*/, 0, 1,
47893 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47899 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
47920 MVT::v512i1, 2/*#Ops*/, 0, 1,
47926 MVT::v512i1, 2/*#Ops*/, 0, 1,
47946 MVT::v512i1, 2/*#Ops*/, 0, 1,
47952 MVT::v512i1, 2/*#Ops*/, 0, 1,
48025 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
48031 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
48053 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
48059 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
48312 MVT::v512i1, 2/*#Ops*/, 0, 1,
48318 MVT::v512i1, 2/*#Ops*/, 0, 1,
48441 MVT::v512i1, 1/*#Ops*/, 0,
48447 MVT::v512i1, 1/*#Ops*/, 0,
48607 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
48613 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
48822 MVT::v512i1, 2/*#Ops*/, 0, 1,
48828 MVT::v512i1, 2/*#Ops*/, 0, 1,
48849 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
48855 MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
49326 MVT::v512i1, 2/*#Ops*/, 0, 1,
49332 MVT::v512i1, 2/*#Ops*/, 0, 1,
49352 MVT::v512i1, 2/*#Ops*/, 0, 1,
49358 MVT::v512i1, 2/*#Ops*/, 0, 1,
49405 MVT::v16i32, MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
49411 MVT::v16i32, MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
50169 MVT::v16i32, MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
50175 MVT::v16i32, MVT::v512i1, 3/*#Ops*/, 0, 1, 2,
50383 MVT::v512i1, 1/*#Ops*/, 0,
50389 MVT::v512i1, 1/*#Ops*/, 0,
59961 /*114556*/ /*SwitchType*/ 74, MVT::v512i1,// ->114632
59972 MVT::v512i1, 2/*#Ops*/, 3, 5,
59985 MVT::v512i1, 2/*#Ops*/, 3, 5,
66764 /*128216*/ /*SwitchType*/ 50, MVT::v512i1,// ->128268
66771 MVT::v512i1, 2/*#Ops*/, 0, 2,
66780 MVT::v512i1, 2/*#Ops*/, 0, 2,
66857 /*128379*/ /*SwitchType*/ 50, MVT::v512i1,// ->128431
66864 MVT::v512i1, 2/*#Ops*/, 0, 2,
66873 MVT::v512i1, 2/*#Ops*/, 0, 2,
66950 /*128542*/ /*SwitchType*/ 50, MVT::v512i1,// ->128594
66957 MVT::v512i1, 2/*#Ops*/, 0, 2,
66966 MVT::v512i1, 2/*#Ops*/, 0, 2,
67011 /*128654*/ OPC_CheckChild0Type, MVT::v512i1,
gen/lib/Target/Hexagon/HexagonGenRegisterInfo.inc 2342 /* 12 */ MVT::v512i1, MVT::v64i1, MVT::v32i1, MVT::v16i1, MVT::Other,
include/llvm/Support/MachineValueType.h 368 SimpleTy == MVT::v8f64 || SimpleTy == MVT::v512i1 ||
437 case v512i1:
556 case v512i1:
785 case v512i1:
912 if (NumElements == 512) return MVT::v512i1;
lib/CodeGen/ValueTypes.cpp 148 case MVT::v512i1: return "v512i1";
292 case MVT::v512i1: return VectorType::get(Type::getInt1Ty(Context), 512);
lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp 2205 SDVTList VTs = CurDAG->getVTList(MVT::v16i32, MVT::v512i1);
2219 SDVTList VTs = CurDAG->getVTList(MVT::v16i32, MVT::v512i1);
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 42 addRegisterClass(MVT::v512i1, &Hexagon::HvxQRRegClass);
utils/TableGen/CodeGenTarget.cpp 88 case MVT::v512i1: return "MVT::v512i1";