|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc23767 /* 45752*/ /*SwitchType*/ 35, MVT::v32i1,// ->45789
23771 MVT::v32i1, 2/*#Ops*/, 0, 1,
23777 MVT::v32i1, 2/*#Ops*/, 0, 1,
23783 MVT::v32i1, 2/*#Ops*/, 0, 1,
23844 /* 45905*/ /*SwitchType*/ 24, MVT::v32i1,// ->45931
23848 MVT::v32i1, 2/*#Ops*/, 1, 0,
23854 MVT::v32i1, 2/*#Ops*/, 1, 0,
24094 /* 46375*/ OPC_CheckType, MVT::v32i1,
24098 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
24104 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
24111 /* 46407*/ OPC_CheckType, MVT::v32i1,
24115 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
24121 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
24128 /* 46439*/ OPC_CheckType, MVT::v32i1,
24132 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
24138 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
24149 /* 46477*/ OPC_CheckType, MVT::v32i1,
24152 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
24158 /* 46494*/ OPC_CheckType, MVT::v32i1,
24161 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
24167 /* 46511*/ OPC_CheckType, MVT::v32i1,
24170 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
24367 /* 46871*/ OPC_CheckType, MVT::v32i1,
24371 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
24377 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
24385 /* 46904*/ OPC_CheckType, MVT::v32i1,
24389 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
24395 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
24403 /* 46937*/ OPC_CheckType, MVT::v32i1,
24407 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
24413 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
24425 /* 46976*/ OPC_CheckType, MVT::v32i1,
24428 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
24435 /* 46994*/ OPC_CheckType, MVT::v32i1,
24438 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
24445 /* 47012*/ OPC_CheckType, MVT::v32i1,
24448 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
24640 /* 47380*/ /*SwitchType*/ 35, MVT::v32i1,// ->47417
24644 MVT::v32i1, 2/*#Ops*/, 0, 1,
24650 MVT::v32i1, 2/*#Ops*/, 0, 1,
24656 MVT::v32i1, 2/*#Ops*/, 0, 1,
28067 /* 54229*/ /*SwitchType*/ 35, MVT::v32i1,// ->54266
28071 MVT::v32i1, 2/*#Ops*/, 0, 1,
28077 MVT::v32i1, 2/*#Ops*/, 0, 1,
28083 MVT::v32i1, 2/*#Ops*/, 0, 1,
28144 /* 54382*/ /*SwitchType*/ 24, MVT::v32i1,// ->54408
28148 MVT::v32i1, 2/*#Ops*/, 1, 0,
28154 MVT::v32i1, 2/*#Ops*/, 1, 0,
28394 /* 54852*/ OPC_CheckType, MVT::v32i1,
28398 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
28404 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
28411 /* 54884*/ OPC_CheckType, MVT::v32i1,
28415 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
28421 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
28428 /* 54916*/ OPC_CheckType, MVT::v32i1,
28432 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
28438 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
28449 /* 54954*/ OPC_CheckType, MVT::v32i1,
28452 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
28458 /* 54971*/ OPC_CheckType, MVT::v32i1,
28461 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
28467 /* 54988*/ OPC_CheckType, MVT::v32i1,
28470 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
28667 /* 55348*/ OPC_CheckType, MVT::v32i1,
28671 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
28677 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
28685 /* 55381*/ OPC_CheckType, MVT::v32i1,
28689 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
28695 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
28703 /* 55414*/ OPC_CheckType, MVT::v32i1,
28707 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
28713 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
28725 /* 55453*/ OPC_CheckType, MVT::v32i1,
28728 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
28735 /* 55471*/ OPC_CheckType, MVT::v32i1,
28738 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
28745 /* 55489*/ OPC_CheckType, MVT::v32i1,
28748 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
28940 /* 55857*/ /*SwitchType*/ 35, MVT::v32i1,// ->55894
28944 MVT::v32i1, 2/*#Ops*/, 0, 1,
28950 MVT::v32i1, 2/*#Ops*/, 0, 1,
28956 MVT::v32i1, 2/*#Ops*/, 0, 1,
30687 /* 59340*/ OPC_CheckType, MVT::v32i1,
30693 MVT::v32i1, 2/*#Ops*/, 0, 1,
30699 MVT::v32i1, 2/*#Ops*/, 0, 1,
30708 MVT::v32i1, 2/*#Ops*/, 0, 1,
30714 MVT::v32i1, 2/*#Ops*/, 0, 1,
30723 MVT::v32i1, 2/*#Ops*/, 0, 1,
30729 MVT::v32i1, 2/*#Ops*/, 0, 1,
30737 /* 59429*/ OPC_CheckType, MVT::v32i1,
30742 MVT::v32i1, 2/*#Ops*/, 0, 1,
30749 MVT::v32i1, 2/*#Ops*/, 0, 1,
30756 MVT::v32i1, 2/*#Ops*/, 0, 1,
54317 /*102622*/ /*SwitchType*/ 32, MVT::v32i1,// ->102656
54321 MVT::v32i1, 1/*#Ops*/, 0,
54327 MVT::v32i1, 1/*#Ops*/, 0,
54333 MVT::v32i1, 1/*#Ops*/, 0,
54377 /*102722*/ /*SwitchType*/ 22, MVT::v32i1,// ->102746
54381 MVT::v32i1, 1/*#Ops*/, 0,
54387 MVT::v32i1, 1/*#Ops*/, 0,
54455 /*102859*/ /*SwitchType*/ 32, MVT::v32i1,// ->102893
54459 MVT::v32i1, 1/*#Ops*/, 0,
54465 MVT::v32i1, 1/*#Ops*/, 0,
54471 MVT::v32i1, 1/*#Ops*/, 0,
54615 /*103149*/ OPC_CheckType, MVT::v32i1,
54619 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
54625 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
54632 /*103181*/ OPC_CheckType, MVT::v32i1,
54636 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
54642 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
54649 /*103213*/ OPC_CheckType, MVT::v32i1,
54653 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
54659 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
54670 /*103251*/ OPC_CheckType, MVT::v32i1,
54673 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
54679 /*103268*/ OPC_CheckType, MVT::v32i1,
54682 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
54688 /*103285*/ OPC_CheckType, MVT::v32i1,
54691 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
54796 /*103482*/ /*SwitchType*/ 22, MVT::v32i1,// ->103506
54800 MVT::v32i1, 1/*#Ops*/, 0,
54806 MVT::v32i1, 1/*#Ops*/, 0,
54960 /*103772*/ OPC_CheckType, MVT::v32i1,
54964 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
54970 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
54978 /*103805*/ OPC_CheckType, MVT::v32i1,
54982 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
54988 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
54996 /*103838*/ OPC_CheckType, MVT::v32i1,
55000 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
55006 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
55018 /*103877*/ OPC_CheckType, MVT::v32i1,
55021 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
55028 /*103895*/ OPC_CheckType, MVT::v32i1,
55031 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
55038 /*103913*/ OPC_CheckType, MVT::v32i1,
55041 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
55234 /*104282*/ /*SwitchType*/ 35, MVT::v32i1,// ->104319
55238 MVT::v32i1, 2/*#Ops*/, 0, 1,
55244 MVT::v32i1, 2/*#Ops*/, 0, 1,
55250 MVT::v32i1, 2/*#Ops*/, 0, 1,
64061 /*122943*/ /*SwitchType*/ 81, MVT::v32i1,// ->123026
64070 MVT::v32i1, 2/*#Ops*/, 0, 2,
64079 MVT::v32i1, 2/*#Ops*/, 0, 2,
64090 MVT::v32i1, 2/*#Ops*/, 0, 2,
68837 /*133278*/ /*SwitchType*/ 99|128,2/*355*/, MVT::v32i1,// ->133636
69427 /*134345*/ /*SwitchType*/ 46, MVT::v32i1,// ->134393
69543 /*134560*/ /*SwitchType*/ 46, MVT::v32i1,// ->134608
69655 /*134764*/ OPC_CheckChild0Type, MVT::v32i1,
71401 /*138869*/ /*SwitchType*/ 29, MVT::v32i1,// ->138900
71405 MVT::v32i1, 0/*#Ops*/,
71411 MVT::v32i1, 0/*#Ops*/,
71417 MVT::v32i1, 0/*#Ops*/,
71463 /*138968*/ /*SwitchType*/ 29, MVT::v32i1,// ->138999
71467 MVT::v32i1, 0/*#Ops*/,
71473 MVT::v32i1, 0/*#Ops*/,
71479 MVT::v32i1, 0/*#Ops*/,
71982 /*140269*/ OPC_CheckChild0Type, MVT::v32i1,
72090 /*140700*/ /*SwitchType*/ 33|128,2/*289*/, MVT::v32i1,// ->140992
72125 MVT::v32i1, 2/*#Ops*/, 16, 18,
72160 MVT::v32i1, 2/*#Ops*/, 16, 18,
gen/lib/Target/Hexagon/HexagonGenRegisterInfo.inc 2342 /* 12 */ MVT::v512i1, MVT::v64i1, MVT::v32i1, MVT::v16i1, MVT::Other,
2343 /* 17 */ MVT::v1024i1, MVT::v128i1, MVT::v64i1, MVT::v32i1, MVT::Other,
gen/lib/Target/X86/X86GenCallingConv.inc 521 if (LocVT == MVT::v32i1) {
822 LocVT == MVT::v32i1) {
1519 if (LocVT == MVT::v32i1) {
1888 LocVT == MVT::v32i1) {
2351 LocVT == MVT::v32i1) {
2758 if (LocVT == MVT::v32i1) {
3039 if (LocVT == MVT::v32i1) {
3609 if (LocVT == MVT::v32i1) {
3809 if (LocVT == MVT::v32i1) {
gen/lib/Target/X86/X86GenDAGISel.inc 7146 /* 15339*/ OPC_CheckChild1Type, MVT::v32i1,
8448 /* 18184*/ OPC_CheckChild3Type, MVT::v32i1,
8496 /* 18286*/ OPC_CheckChild3Type, MVT::v32i1,
23284 /* 47350*/ OPC_CheckType, MVT::v32i1,
23290 MVT::v32i1, 8/*#Ops*/, 0, 2, 5, 6, 7, 8, 9, 10,
23310 /* 47402*/ OPC_CheckType, MVT::v32i1,
23316 MVT::v32i1, 8/*#Ops*/, 0, 4, 5, 6, 7, 8, 9, 10,
23440 /* 47656*/ OPC_CheckType, MVT::v32i1,
23446 MVT::v32i1, 8/*#Ops*/, 0, 2, 5, 6, 7, 8, 9, 10,
23466 /* 47708*/ OPC_CheckType, MVT::v32i1,
23472 MVT::v32i1, 8/*#Ops*/, 0, 4, 5, 6, 7, 8, 9, 10,
23544 /* 47860*/ OPC_CheckType, MVT::v32i1,
23550 MVT::v32i1, 8/*#Ops*/, 0, 2, 5, 6, 7, 8, 9, 10,
23570 /* 47912*/ OPC_CheckType, MVT::v32i1,
23576 MVT::v32i1, 8/*#Ops*/, 0, 4, 5, 6, 7, 8, 9, 10,
23700 /* 48166*/ OPC_CheckType, MVT::v32i1,
23706 MVT::v32i1, 8/*#Ops*/, 0, 2, 5, 6, 7, 8, 9, 10,
23726 /* 48218*/ OPC_CheckType, MVT::v32i1,
23732 MVT::v32i1, 8/*#Ops*/, 0, 4, 5, 6, 7, 8, 9, 10,
25102 /* 50914*/ OPC_CheckType, MVT::v32i1,
25107 MVT::v32i1, 7/*#Ops*/, 0, 1, 4, 5, 6, 7, 8,
25195 /* 51094*/ OPC_CheckType, MVT::v32i1,
25201 MVT::v32i1, 8/*#Ops*/, 4, 1, 5, 6, 7, 8, 9, 10,
25208 /* 51124*/ OPC_CheckType, MVT::v32i1,
25214 MVT::v32i1, 8/*#Ops*/, 4, 1, 5, 6, 7, 8, 9, 10,
25277 /* 51260*/ OPC_CheckType, MVT::v32i1,
25283 MVT::v32i1, 8/*#Ops*/, 4, 1, 5, 6, 7, 8, 9, 10,
25290 /* 51290*/ OPC_CheckType, MVT::v32i1,
25296 MVT::v32i1, 8/*#Ops*/, 4, 1, 5, 6, 7, 8, 9, 10,
25898 /* 52531*/ OPC_CheckType, MVT::v32i1,
25903 MVT::v32i1, 7/*#Ops*/, 3, 0, 4, 5, 6, 7, 8,
25985 /* 52705*/ OPC_CheckType, MVT::v32i1,
25991 MVT::v32i1, 8/*#Ops*/, 4, 3, 5, 6, 7, 8, 9, 10,
25998 /* 52735*/ OPC_CheckType, MVT::v32i1,
26004 MVT::v32i1, 8/*#Ops*/, 4, 3, 5, 6, 7, 8, 9, 10,
26051 /* 52847*/ OPC_CheckType, MVT::v32i1,
26057 MVT::v32i1, 8/*#Ops*/, 4, 3, 5, 6, 7, 8, 9, 10,
26064 /* 52877*/ OPC_CheckType, MVT::v32i1,
26070 MVT::v32i1, 8/*#Ops*/, 4, 3, 5, 6, 7, 8, 9, 10,
28897 /* 59333*/ /*SwitchType*/ 10, MVT::v32i1,// ->59345
28900 MVT::v32i1, 2/*#Ops*/, 0, 1,
29333 /* 60075*/ OPC_CheckType, MVT::v32i1,
29336 MVT::v32i1, 2/*#Ops*/, 0, 1,
29349 /* 60100*/ OPC_CheckType, MVT::v32i1,
29352 MVT::v32i1, 2/*#Ops*/, 1, 0,
29361 /* 60118*/ OPC_CheckType, MVT::v32i1,
29364 MVT::v32i1, 2/*#Ops*/, 1, 0,
29976 /* 61612*/ OPC_CheckType, MVT::v32i1,
29980 MVT::v32i1, 4/*#Ops*/, 0, 2, 3, 4,
29986 /* 61633*/ OPC_CheckType, MVT::v32i1,
29990 MVT::v32i1, 4/*#Ops*/, 0, 2, 3, 4,
30030 /* 61718*/ OPC_CheckType, MVT::v32i1,
30034 MVT::v32i1, 4/*#Ops*/, 0, 2, 3, 4,
30040 /* 61739*/ OPC_CheckType, MVT::v32i1,
30044 MVT::v32i1, 4/*#Ops*/, 0, 2, 3, 4,
30285 /* 62216*/ OPC_CheckType, MVT::v32i1,
30288 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
30346 /* 62328*/ OPC_CheckType, MVT::v32i1,
30350 MVT::v32i1, 4/*#Ops*/, 3, 1, 2, 4,
30357 /* 62350*/ OPC_CheckType, MVT::v32i1,
30361 MVT::v32i1, 4/*#Ops*/, 3, 1, 2, 4,
30404 /* 62438*/ OPC_CheckType, MVT::v32i1,
30408 MVT::v32i1, 4/*#Ops*/, 3, 1, 2, 4,
30415 /* 62460*/ OPC_CheckType, MVT::v32i1,
30419 MVT::v32i1, 4/*#Ops*/, 3, 1, 2, 4,
30679 /* 62956*/ OPC_CheckType, MVT::v32i1,
30682 MVT::v32i1, 3/*#Ops*/, 2, 0, 1,
30950 /* 63699*/ OPC_CheckType, MVT::v32i1,
30970 MVT::v32i1, 2/*#Ops*/, 13, 14,
30976 /* 63778*/ OPC_CheckType, MVT::v32i1,
30996 MVT::v32i1, 2/*#Ops*/, 13, 14,
31072 MVT::v32i1, 2/*#Ops*/, 0, 4, // Results = #5
31085 MVT::v32i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31098 MVT::v32i1, 2/*#Ops*/, 0, 4, // Results = #5
31111 MVT::v32i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31131 MVT::v32i1, 2/*#Ops*/, 0, 4, // Results = #5
31144 MVT::v32i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31157 MVT::v32i1, 2/*#Ops*/, 0, 4, // Results = #5
31170 MVT::v32i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31436 /* 65077*/ OPC_CheckType, MVT::v32i1,
31456 MVT::v32i1, 2/*#Ops*/, 13, 14,
31463 /* 65157*/ OPC_CheckType, MVT::v32i1,
31483 MVT::v32i1, 2/*#Ops*/, 13, 14,
31562 MVT::v32i1, 2/*#Ops*/, 3, 4, // Results = #5
31575 MVT::v32i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31589 MVT::v32i1, 2/*#Ops*/, 3, 4, // Results = #5
31602 MVT::v32i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31623 MVT::v32i1, 2/*#Ops*/, 3, 4, // Results = #5
31636 MVT::v32i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31650 MVT::v32i1, 2/*#Ops*/, 3, 4, // Results = #5
31663 MVT::v32i1, 4/*#Ops*/, 5, 8, 11, 12, // Results = #13
31862 /* 66121*/ /*SwitchType*/ 10, MVT::v32i1,// ->66133
31865 MVT::v32i1, 2/*#Ops*/, 0, 1,
33857 /* 70402*/ /*SwitchType*/ 12, MVT::v32i1,// ->70416
33860 MVT::v32i1, 3/*#Ops*/, 0, 1, 2,
41915 /* 87606*/ /*SwitchType*/ 13, MVT::v32i1,// ->87621
41919 MVT::v32i1, 2/*#Ops*/, 0, 1,
42034 /* 87878*/ /*SwitchType*/ 31, MVT::v32i1,// ->87911
42043 MVT::v32i1, 2/*#Ops*/, 3, 4,
47374 /* 99279*/ /*SwitchType*/ 10, MVT::v32i1,// ->99291
47377 MVT::v32i1, 2/*#Ops*/, 0, 1,
48683 /*102296*/ /*SwitchType*/ 10, MVT::v32i1,// ->102308
48686 MVT::v32i1, 2/*#Ops*/, 0, 1,
48853 /*102556*/ OPC_CheckType, MVT::v32i1,
48856 MVT::v32i1, 2/*#Ops*/, 0, 1,
48866 /*102575*/ OPC_CheckType, MVT::v32i1,
48869 MVT::v32i1, 2/*#Ops*/, 0, 1,
48881 /*102598*/ OPC_CheckType, MVT::v32i1,
48884 MVT::v32i1, 2/*#Ops*/, 0, 1,
48898 /*102624*/ OPC_CheckType, MVT::v32i1,
48901 MVT::v32i1, 2/*#Ops*/, 1, 0,
48910 /*102642*/ OPC_CheckType, MVT::v32i1,
48913 MVT::v32i1, 2/*#Ops*/, 1, 0,
49410 /*103764*/ /*SwitchType*/ 9, MVT::v32i1,// ->103775
49413 MVT::v32i1, 1/*#Ops*/, 0,
49525 /*104021*/ /*SwitchType*/ 9, MVT::v32i1,// ->104032
49528 MVT::v32i1, 1/*#Ops*/, 0,
50306 /*106152*/ /*SwitchType*/ 10, MVT::v32i1,// ->106164
50309 MVT::v32i1, 2/*#Ops*/, 0, 1,
52030 /*110082*/ /*SwitchType*/ 17, MVT::v32i1,// ->110101
52035 MVT::v32i1, 5/*#Ops*/, 2, 3, 4, 5, 6,
53456 /*113264*/ OPC_CheckChild3Type, MVT::v32i1,
53868 /*114137*/ OPC_CheckChild3Type, MVT::v32i1,
55815 /*118292*/ OPC_CheckChild0Type, MVT::v32i1,
56008 /*118677*/ OPC_CheckChild0Type, MVT::v32i1,
56107 /*118862*/ OPC_CheckChild0Type, MVT::v32i1,
56461 /*119555*/ OPC_SwitchType /*4 cases */, 13, MVT::v32i1,// ->119571
56465 MVT::v32i1, 2/*#Ops*/, 0, 1,
56912 /*120452*/ OPC_CheckChild0Type, MVT::v32i1,
57367 /*121352*/ OPC_CheckChild0Type, MVT::v32i1,
58298 /*123065*/ OPC_CheckChild0Type, MVT::v32i1,
58333 /*123127*/ OPC_CheckChild0Type, MVT::v32i1,
119594 /*246861*/ OPC_CheckChild0Type, MVT::v32i1,
126469 MVT::v32i1, 2/*#Ops*/, 0, 2, // Results = #3
127996 MVT::v32i1, 2/*#Ops*/, 0, 6, // Results = #7
147112 MVT::v32i1, 2/*#Ops*/, 0, 2, // Results = #3
148366 MVT::v32i1, 2/*#Ops*/, 0, 6, // Results = #7
186626 /*377329*/ OPC_CheckChild0Type, MVT::v32i1,
194149 /*392412*/ OPC_SwitchType /*4 cases */, 13, MVT::v32i1,// ->392428
194153 MVT::v32i1, 2/*#Ops*/, 0, 1,
194183 /*392483*/ OPC_SwitchType /*3 cases */, 13, MVT::v32i1,// ->392499
194187 MVT::v32i1, 2/*#Ops*/, 0, 1,
194210 /*392539*/ OPC_SwitchType /*2 cases */, 13, MVT::v32i1,// ->392555
194214 MVT::v32i1, 2/*#Ops*/, 0, 1,
194225 /*392571*/ /*SwitchType*/ 22, MVT::v32i1,// ->392595
194256 /*392635*/ /*SwitchType*/ 13, MVT::v32i1,// ->392650
194260 MVT::v32i1, 2/*#Ops*/, 0, 1,
194290 /*392706*/ /*SwitchType*/ 13, MVT::v32i1,// ->392721
194294 MVT::v32i1, 2/*#Ops*/, 0, 1,
194626 /*393505*/ /*SwitchType*/ 59, MVT::v32i1,// ->393566
194633 MVT::v32i1, 2/*#Ops*/, 1, 2,
194640 MVT::v32i1, 2/*#Ops*/, 0, 1, // Results = #2
194643 MVT::v32i1, 2/*#Ops*/, 2, 3, // Results = #4
194646 MVT::v32i1, 2/*#Ops*/, 4, 5,
194678 /*393633*/ OPC_SwitchType /*2 cases */, 20, MVT::v32i1,// ->393656
194684 MVT::v32i1, 2/*#Ops*/, 1, 2,
194698 /*393680*/ OPC_CheckChild1Type, MVT::v32i1,
194703 MVT::v32i1, 1/*#Ops*/, 0, // Results = #1
194738 /*393787*/ /*SwitchType*/ 35, MVT::v32i1,// ->393824
194742 MVT::v32i1, 2/*#Ops*/, 0, 1, // Results = #2
194745 MVT::v32i1, 2/*#Ops*/, 2, 3, // Results = #4
194748 MVT::v32i1, 2/*#Ops*/, 4, 5,
194794 /*393943*/ /*SwitchType*/ 35, MVT::v32i1,// ->393980
194798 MVT::v32i1, 2/*#Ops*/, 0, 1, // Results = #2
194801 MVT::v32i1, 2/*#Ops*/, 2, 3, // Results = #4
194804 MVT::v32i1, 2/*#Ops*/, 4, 5,
194850 /*394099*/ /*SwitchType*/ 35, MVT::v32i1,// ->394136
194854 MVT::v32i1, 2/*#Ops*/, 0, 1, // Results = #2
194857 MVT::v32i1, 2/*#Ops*/, 2, 3, // Results = #4
194860 MVT::v32i1, 2/*#Ops*/, 4, 5,
194914 /*394248*/ /*SwitchType*/ 11, MVT::v32i1,// ->394261
194917 MVT::v32i1, 2/*#Ops*/, 0, 1,
194948 /*394320*/ /*SwitchType*/ 11, MVT::v32i1,// ->394333
194951 MVT::v32i1, 2/*#Ops*/, 0, 1,
194976 /*394379*/ /*SwitchType*/ 11, MVT::v32i1,// ->394392
194979 MVT::v32i1, 2/*#Ops*/, 0, 1,
194998 /*394425*/ /*SwitchType*/ 11, MVT::v32i1,// ->394438
195001 MVT::v32i1, 2/*#Ops*/, 0, 1,
195014 /*394457*/ OPC_SwitchType /*2 cases */, 11, MVT::v32i1,// ->394471
195017 MVT::v32i1, 2/*#Ops*/, 0, 1,
195028 /*394486*/ OPC_CheckChild1Type, MVT::v32i1,
206531 /*418242*/ OPC_CheckChild2Type, MVT::v32i1,
207551 /*420528*/ OPC_CheckType, MVT::v32i1,
207557 MVT::v32i1, 7/*#Ops*/, 1, 4, 5, 6, 7, 8, 9,
207576 /*420576*/ OPC_CheckType, MVT::v32i1,
207582 MVT::v32i1, 7/*#Ops*/, 3, 4, 5, 6, 7, 8, 9,
207701 /*420816*/ OPC_CheckType, MVT::v32i1,
207707 MVT::v32i1, 7/*#Ops*/, 1, 4, 5, 6, 7, 8, 9,
207726 /*420864*/ OPC_CheckType, MVT::v32i1,
207732 MVT::v32i1, 7/*#Ops*/, 3, 4, 5, 6, 7, 8, 9,
207801 /*421008*/ OPC_CheckType, MVT::v32i1,
207807 MVT::v32i1, 7/*#Ops*/, 1, 4, 5, 6, 7, 8, 9,
207826 /*421056*/ OPC_CheckType, MVT::v32i1,
207832 MVT::v32i1, 7/*#Ops*/, 3, 4, 5, 6, 7, 8, 9,
207951 /*421296*/ OPC_CheckType, MVT::v32i1,
207957 MVT::v32i1, 7/*#Ops*/, 1, 4, 5, 6, 7, 8, 9,
207976 /*421344*/ OPC_CheckType, MVT::v32i1,
207982 MVT::v32i1, 7/*#Ops*/, 3, 4, 5, 6, 7, 8, 9,
209791 /*425045*/ OPC_CheckType, MVT::v32i1,
209795 MVT::v32i1, 1/*#Ops*/, 0,
209809 MVT::v32i1, 2/*#Ops*/, 4, 5,
209843 /*425163*/ OPC_CheckType, MVT::v32i1,
209846 MVT::v32i1, 1/*#Ops*/, 0,
209868 MVT::v32i1, 1/*#Ops*/, 3, // Results = #4
209894 MVT::v32i1, 1/*#Ops*/, 3, // Results = #4
210059 /*425625*/ OPC_CheckType, MVT::v32i1,
210065 MVT::v32i1, 3/*#Ops*/, 1, 2, 3,
210073 MVT::v32i1, 3/*#Ops*/, 1, 2, 3,
210094 MVT::v32i1, 2/*#Ops*/, 10, 11,
210115 MVT::v32i1, 2/*#Ops*/, 10, 11,
210191 /*425976*/ OPC_CheckType, MVT::v32i1,
210197 MVT::v32i1, 3/*#Ops*/, 1, 2, 3,
210205 MVT::v32i1, 3/*#Ops*/, 1, 2, 3,
210247 MVT::v32i1, 3/*#Ops*/, 5, 8, 9, // Results = #10
210268 MVT::v32i1, 3/*#Ops*/, 5, 8, 9, // Results = #10
210313 MVT::v32i1, 3/*#Ops*/, 5, 8, 9, // Results = #10
210334 MVT::v32i1, 3/*#Ops*/, 5, 8, 9, // Results = #10
226668 /*462190*/ OPC_CheckType, MVT::v32i1,
226673 MVT::v32i1, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
226678 /*462212*/ OPC_CheckType, MVT::v32i1,
226681 MVT::v32i1, 2/*#Ops*/, 0, 1,
228559 /*466456*/ OPC_CheckChild0Type, MVT::v32i1,
228632 /*466611*/ OPC_CheckType, MVT::v32i1,
228635 MVT::v32i1, 2/*#Ops*/, 0, 1,
231088 /*471476*/ /*SwitchType*/ 10, MVT::v32i1,// ->471488
231091 MVT::v32i1, 2/*#Ops*/, 0, 1,
231119 /*471536*/ /*SwitchType*/ 10, MVT::v32i1,// ->471548
231122 MVT::v32i1, 2/*#Ops*/, 0, 1,
231363 /*471950*/ /*SwitchType*/ 8, MVT::v32i1,// ->471960
231366 MVT::v32i1, 0/*#Ops*/,
231524 /*472244*/ /*SwitchType*/ 8, MVT::v32i1,// ->472254
231527 MVT::v32i1, 0/*#Ops*/,
231634 /*472462*/ /*SwitchType*/ 10, MVT::v32i1,// ->472474
231637 MVT::v32i1, 2/*#Ops*/, 0, 1,
231657 /*472507*/ /*SwitchType*/ 13, MVT::v32i1,// ->472522
231662 MVT::v32i1, 2/*#Ops*/, 1, 0,
231666 /*472524*/ OPC_CheckChild0Type, MVT::v32i1,
gen/lib/Target/X86/X86GenFastISel.inc 332 case MVT::v32i1: return fastEmit_ISD_ANY_EXTEND_MVT_v32i1_r(RetVT, Op0, Op0IsKill);
1641 case MVT::v32i1: return fastEmit_ISD_SIGN_EXTEND_MVT_v32i1_r(RetVT, Op0, Op0IsKill);
6224 if (RetVT.SimpleTy != MVT::v32i1)
6405 case MVT::v32i1: return fastEmit_ISD_AND_MVT_v32i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
7231 if (RetVT.SimpleTy != MVT::v32i1)
7412 case MVT::v32i1: return fastEmit_ISD_OR_MVT_v32i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
8857 if (RetVT.SimpleTy != MVT::v32i1)
9038 case MVT::v32i1: return fastEmit_ISD_XOR_MVT_v32i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
10871 if (RetVT.SimpleTy != MVT::v32i1)
10892 case MVT::v32i1: return fastEmit_X86ISD_KADD_MVT_v32i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
10940 case MVT::v32i1: return fastEmit_X86ISD_KORTEST_MVT_v32i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
10988 case MVT::v32i1: return fastEmit_X86ISD_KTEST_MVT_v32i1_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
12995 if (RetVT.SimpleTy != MVT::v32i1)
gen/lib/Target/X86/X86GenRegisterInfo.inc 4485 /* 34 */ MVT::v32i1, MVT::Other,
include/llvm/Support/MachineValueType.h 335 return (SimpleTy == MVT::v32i1 || SimpleTy == MVT::v4i8 ||
433 case v32i1:
573 case v32i1:
715 case v32i1:
908 if (NumElements == 32) return MVT::v32i1;
lib/CodeGen/ValueTypes.cpp 144 case MVT::v32i1: return "v32i1";
288 case MVT::v32i1: return VectorType::get(Type::getInt1Ty(Context), 32);
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 40 addRegisterClass(MVT::v32i1, &Hexagon::HvxQRRegClass);
50 addRegisterClass(MVT::v32i1, &Hexagon::HvxQRRegClass);
lib/Target/X86/X86ISelDAGToDAG.cpp 4223 case MVT::v32i1: return X86::VK32RegClassID;
lib/Target/X86/X86ISelLowering.cpp 1129 setOperationAction(ISD::BITCAST, MVT::v32i1, Custom);
1591 addRegisterClass(MVT::v32i1, &X86::VK32RegClass);
1594 for (auto VT : { MVT::v32i1, MVT::v64i1 }) {
1613 setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i1, Custom);
1615 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v32i1, Custom);
1617 for (auto VT : { MVT::v16i1, MVT::v32i1 })
1926 if (VT == MVT::v32i1 && Subtarget.hasAVX512() && !Subtarget.hasBWI())
1940 if (VT == MVT::v32i1 && Subtarget.hasAVX512() && !Subtarget.hasBWI())
1960 if (VT == MVT::v32i1 && Subtarget.hasAVX512() && !Subtarget.hasBWI())
2428 if ((ValVT == MVT::v32i1 && ValLoc == MVT::i32) ||
2772 Lo = DAG.getBitcast(MVT::v32i1, ArgValueLo);
2775 Hi = DAG.getBitcast(MVT::v32i1, ArgValueHi);
2805 case MVT::v32i1:
3264 else if (RegVT == MVT::v32i1)
8551 ImmL = DAG.getBitcast(MVT::v32i1, ImmL);
8552 ImmH = DAG.getBitcast(MVT::v32i1, ImmH);
16946 case MVT::v32i1:
20959 !(Subtarget.hasBWI() && (VT == MVT::v32i1 || VT == MVT::v64i1)))
20975 if (Subtarget.hasBWI() && (VT == MVT::v32i1 || VT == MVT::v64i1))
21281 SDValue Lo = DAG.getSelect(DL, MVT::v32i1, Cond, Op1Lo, Op2Lo);
21282 SDValue Hi = DAG.getSelect(DL, MVT::v32i1, Cond, Op1Hi, Op2Hi);
22606 Lo = DAG.getBitcast(MVT::v32i1, Lo);
22607 Hi = DAG.getBitcast(MVT::v32i1, Hi);
26770 Lo = DAG.getBitcast(MVT::v32i1, Lo);
26773 Hi = DAG.getBitcast(MVT::v32i1, Hi);
26790 if ((SrcVT == MVT::v16i1 || SrcVT == MVT::v32i1) && DstVT.isScalarInteger()) {
35282 case MVT::v32i1:
40534 if ((VT == MVT::v8i1 || VT == MVT::v16i1 || VT == MVT::v32i1 ||
40539 SDValue Lo = DAG.getBuildVector(MVT::v32i1, dl,
40542 SDValue Hi = DAG.getBuildVector(MVT::v32i1, dl,
42705 CmpVT = PreferKOT ? MVT::v32i1 : VecVT;
42789 CmpVT == MVT::v32i1 ? MVT::i32 : MVT::i16;
lib/Target/X86/X86TargetTransformInfo.cpp 1288 { ISD::SIGN_EXTEND, MVT::v32i8, MVT::v32i1, 1 },
1289 { ISD::SIGN_EXTEND, MVT::v32i16, MVT::v32i1, 1 },
1296 { ISD::ZERO_EXTEND, MVT::v32i8, MVT::v32i1, 2 },
1297 { ISD::ZERO_EXTEND, MVT::v32i16, MVT::v32i1, 2 },
utils/TableGen/CodeGenTarget.cpp 85 case MVT::v32i1: return "MVT::v32i1";