reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/Hexagon/HexagonGenCallingConv.inc
  203         LocVT == MVT::v256i8) {
  227         LocVT == MVT::v256i8) {
  343         LocVT == MVT::v256i8) {
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc
26003 /* 49924*/      /*SwitchType*/ 10, MVT::v256i8,// ->49936
26006                       MVT::v256i8, 2/*#Ops*/, 0, 1, 
26546 /* 50981*/      /*SwitchType*/ 10, MVT::v256i8,// ->50993
26549                       MVT::v256i8, 2/*#Ops*/, 0, 1, 
52245 /* 98524*/      /*SwitchType*/ 11, MVT::v256i8,// ->98537
52248                       MVT::v256i8, 3/*#Ops*/, 0, 1, 2, 
65305                       MVT::v256i8, 1/*#Ops*/, 0,  // Results = #1
65312                       MVT::v256i8, 1/*#Ops*/, 0,  // Results = #5
66973 /*128598*/      OPC_SwitchType /*2 cases */, 5, MVT::v256i8,// ->128606
66985 /*128615*/      OPC_CheckChild0Type, MVT::v256i8,
66999 /*128636*/      OPC_SwitchType /*2 cases */, 5, MVT::v256i8,// ->128644
68150                     MVT::v256i8, 1/*#Ops*/, 0,  // Results = #1
68157                     MVT::v256i8, 1/*#Ops*/, 0,  // Results = #5
68216                     MVT::v256i8, 1/*#Ops*/, 1,  // Results = #2
68223                     MVT::v256i8, 1/*#Ops*/, 5,  // Results = #6
69861 /*135241*/        OPC_SwitchType /*2 cases */, 56, MVT::v256i8,// ->135300
69877                         MVT::v256i8, 5/*#Ops*/, 1, 4, 5, 8, 9, 
70231 /*136205*/      OPC_CheckType, MVT::v256i8,
70245                     MVT::v256i8, 5/*#Ops*/, 1, 3, 4, 6, 7, 
70276 /*136333*/        OPC_CheckType, MVT::v256i8,
70279                       MVT::v256i8, 0/*#Ops*/, 
70364 /*136473*/      OPC_SwitchType /*6 cases */, 25, MVT::v256i8,// ->136501
70372                       MVT::v256i8, 5/*#Ops*/, 2, 1, 3, 0, 4, 
70583                     MVT::v256i8, 1/*#Ops*/, 0,  // Results = #2
70590                     MVT::v256i8, 1/*#Ops*/, 0,  // Results = #6
70762                     MVT::v256i8, 1/*#Ops*/, 0,  // Results = #2
70769                     MVT::v256i8, 1/*#Ops*/, 0,  // Results = #6
70941                     MVT::v256i8, 1/*#Ops*/, 0,  // Results = #2
70948                     MVT::v256i8, 1/*#Ops*/, 0,  // Results = #6
71105 /*138215*/    /*SwitchType*/ 8, MVT::v256i8,// ->138225
71108                     MVT::v256i8, 0/*#Ops*/, 
71334 /*138709*/    /*SwitchType*/ 36, MVT::v256i8,// ->138747
71344                     MVT::v256i8, 5/*#Ops*/, 1, 2, 3, 4, 5, 
71506                         MVT::v256i8, 1/*#Ops*/, 0,  // Results = #1
71535                         MVT::v256i8, 1/*#Ops*/, 0,  // Results = #1
71540                         MVT::v256i8, 1/*#Ops*/, 3,  // Results = #4
71635                       MVT::v256i8, 1/*#Ops*/, 0,  // Results = #1
71683 /*139476*/      OPC_CheckChild0Type, MVT::v256i8,
71699                       MVT::v256i8, 1/*#Ops*/, 2,  // Results = #3
71728                         MVT::v256i8, 1/*#Ops*/, 0,  // Results = #1
71757                         MVT::v256i8, 1/*#Ops*/, 0,  // Results = #1
71762                         MVT::v256i8, 1/*#Ops*/, 3,  // Results = #4
71857                       MVT::v256i8, 1/*#Ops*/, 0,  // Results = #1
71905 /*140022*/      OPC_CheckChild0Type, MVT::v256i8,
71921                       MVT::v256i8, 1/*#Ops*/, 2,  // Results = #3
gen/lib/Target/Hexagon/HexagonGenRegisterInfo.inc
 2348   /* 41 */ MVT::v256i8, MVT::v128i16, MVT::v64i32, MVT::Other,
include/llvm/Support/MachineValueType.h
  382       return (SimpleTy == MVT::v256i8 || SimpleTy == MVT::v128i16 ||
  453       case v256i8:
  560       case v256i8:
  806       case v256i8:
  924         if (NumElements == 256) return MVT::v256i8;
lib/CodeGen/ValueTypes.cpp
  158   case MVT::v256i8:  return "v256i8";
  302   case MVT::v256i8:  return VectorType::get(Type::getInt8Ty(Context), 256);
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
   19 static const MVT LegalW128[] = { MVT::v256i8, MVT::v128i16, MVT::v64i32 };
   47     addRegisterClass(MVT::v256i8,  &Hexagon::HvxWRRegClass);
   62   MVT ByteW = Use64b ? MVT::v128i8 : MVT::v256i8;
utils/TableGen/CodeGenTarget.cpp
   98   case MVT::v256i8:   return "MVT::v256i8";