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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenCallingConv.inc 149 LocVT == MVT::nxv8i16 ||
170 LocVT == MVT::nxv8i16 ||
1159 LocVT == MVT::nxv8i16 ||
gen/lib/Target/AArch64/AArch64GenDAGISel.inc80799 /*188534*/ OPC_CheckChild2Type, MVT::nxv8i16,
80801 /*188537*/ OPC_CheckChild3Type, MVT::nxv8i16,
80839 /*188607*/ OPC_CheckChild2Type, MVT::nxv8i16,
80841 /*188610*/ OPC_CheckChild3Type, MVT::nxv8i16,
82200 /*191143*/ OPC_CheckChild2Type, MVT::nxv8i16,
82202 /*191146*/ OPC_CheckChild3Type, MVT::nxv8i16,
82226 /*191192*/ OPC_CheckChild2Type, MVT::nxv8i16,
82228 /*191195*/ OPC_CheckChild3Type, MVT::nxv8i16,
82249 /*191236*/ /*SwitchType*/ 19, MVT::nxv8i16,// ->191257
82250 /*191238*/ OPC_CheckChild1Type, MVT::nxv8i16,
82254 /*191244*/ OPC_CheckChild3Type, MVT::nxv8i16,
82257 MVT::nxv8i16, 3/*#Ops*/, 0, 1, 2,
82297 /*191327*/ /*SwitchType*/ 19, MVT::nxv8i16,// ->191348
82298 /*191329*/ OPC_CheckChild1Type, MVT::nxv8i16,
82302 /*191335*/ OPC_CheckChild3Type, MVT::nxv8i16,
82305 MVT::nxv8i16, 3/*#Ops*/, 0, 1, 2,
82345 /*191419*/ /*SwitchType*/ 36, MVT::nxv8i16,// ->191457
82346 /*191421*/ OPC_CheckChild1Type, MVT::nxv8i16,
82351 /*191429*/ OPC_CheckChild3Type, MVT::nxv8i16,
82354 MVT::nxv8i16, 3/*#Ops*/, 0, 1, 2,
82361 MVT::nxv8i16, 3/*#Ops*/, 0, 1, 2,
101565 /*227667*/ OPC_CheckChild0Type, MVT::nxv8i16,
101604 /*227724*/ /*SwitchType*/ 5, MVT::nxv8i16,// ->227731
101637 /*227771*/ /*SwitchType*/ 5, MVT::nxv8i16,// ->227778
101670 /*227818*/ /*SwitchType*/ 5, MVT::nxv8i16,// ->227825
101703 /*227865*/ /*SwitchType*/ 5, MVT::nxv8i16,// ->227872
101736 /*227912*/ /*SwitchType*/ 5, MVT::nxv8i16,// ->227919
101764 /*227951*/ OPC_SwitchType /*6 cases */, 5, MVT::nxv8i16,// ->227959
110642 /*247156*/ /*SwitchType*/ 9, MVT::nxv8i16,// ->247167
110645 MVT::nxv8i16, 1/*#Ops*/, 0,
111812 /*249612*/ OPC_CheckType, MVT::nxv8i16,
111818 MVT::nxv8i16, 3/*#Ops*/, 2, 1, 4,
111824 /*249637*/ OPC_CheckType, MVT::nxv8i16,
111830 MVT::nxv8i16, 3/*#Ops*/, 2, 1, 4,
111835 /*249660*/ OPC_SwitchType /*2 cases */, 18, MVT::nxv8i16,// ->249681
111841 MVT::nxv8i16, 3/*#Ops*/, 2, 1, 4,
114364 /*254671*/ OPC_SwitchType /*3 cases */, 11, MVT::nxv8i16,// ->254685
114368 MVT::nxv8i16, 1/*#Ops*/, 0,
114372 /*254687*/ OPC_CheckChild0Type, MVT::nxv8i16,
114388 /*254716*/ OPC_SwitchType /*3 cases */, 11, MVT::nxv8i16,// ->254730
114392 MVT::nxv8i16, 1/*#Ops*/, 0,
114396 /*254732*/ OPC_CheckChild0Type, MVT::nxv8i16,
114412 /*254761*/ OPC_SwitchType /*3 cases */, 11, MVT::nxv8i16,// ->254775
114416 MVT::nxv8i16, 1/*#Ops*/, 0,
114420 /*254777*/ OPC_CheckChild0Type, MVT::nxv8i16,
114436 /*254806*/ OPC_SwitchType /*3 cases */, 11, MVT::nxv8i16,// ->254820
114440 MVT::nxv8i16, 1/*#Ops*/, 0,
114444 /*254822*/ OPC_CheckChild0Type, MVT::nxv8i16,
gen/lib/Target/AArch64/AArch64GenFastISel.inc 648 case MVT::nxv8i16: return fastEmit_AArch64ISD_DUP_MVT_i32_MVT_nxv8i16_r(Op0, Op0IsKill);
1479 if (RetVT.SimpleTy != MVT::nxv8i16)
1508 case MVT::nxv8i16: return fastEmit_AArch64ISD_SUNPKHI_MVT_nxv8i16_r(RetVT, Op0, Op0IsKill);
1517 if (RetVT.SimpleTy != MVT::nxv8i16)
1546 case MVT::nxv8i16: return fastEmit_AArch64ISD_SUNPKLO_MVT_nxv8i16_r(RetVT, Op0, Op0IsKill);
1593 if (RetVT.SimpleTy != MVT::nxv8i16)
1622 case MVT::nxv8i16: return fastEmit_AArch64ISD_UUNPKHI_MVT_nxv8i16_r(RetVT, Op0, Op0IsKill);
1631 if (RetVT.SimpleTy != MVT::nxv8i16)
1660 case MVT::nxv8i16: return fastEmit_AArch64ISD_UUNPKLO_MVT_nxv8i16_r(RetVT, Op0, Op0IsKill);
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 5187 /* 39 */ MVT::nxv16i8, MVT::nxv8i16, MVT::nxv4i32, MVT::nxv2i64, MVT::nxv2f16, MVT::nxv4f16, MVT::nxv8f16, MVT::nxv1f32, MVT::nxv2f32, MVT::nxv4f32, MVT::nxv1f64, MVT::nxv2f64, MVT::Other,
include/llvm/Support/MachineValueType.h 472 case nxv8i16:
608 case nxv8i16:
763 case nxv8i16:
1022 if (NumElements == 8) return MVT::nxv8i16;
lib/CodeGen/ValueTypes.cpp 228 case MVT::nxv8i16: return "nxv8i16";
387 case MVT::nxv8i16:
lib/Target/AArch64/AArch64ISelLowering.cpp 174 addRegisterClass(MVT::nxv8i16, &AArch64::ZPRRegClass);
utils/TableGen/CodeGenTarget.cpp 168 case MVT::nxv8i16: return "MVT::nxv8i16";