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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenCallingConv.inc 157 LocVT == MVT::nxv4f32 ||
178 LocVT == MVT::nxv4f32 ||
1167 LocVT == MVT::nxv4f32 ||
gen/lib/Target/AArch64/AArch64GenDAGISel.inc82378 /*191481*/ OPC_CheckChild3Type, MVT::nxv4f32,
101586 /*227698*/ /*SwitchType*/ 5, MVT::nxv4f32,// ->227705
101619 /*227745*/ /*SwitchType*/ 5, MVT::nxv4f32,// ->227752
101652 /*227792*/ /*SwitchType*/ 5, MVT::nxv4f32,// ->227799
101685 /*227839*/ /*SwitchType*/ 5, MVT::nxv4f32,// ->227846
101697 /*227855*/ OPC_CheckChild0Type, MVT::nxv4f32,
101756 /*227940*/ /*SwitchType*/ 5, MVT::nxv4f32,// ->227947
101784 /*227980*/ /*SwitchType*/ 5, MVT::nxv4f32,// ->227987
104787 /*234613*/ /*SwitchType*/ 10, MVT::nxv4f32,// ->234625
104790 MVT::nxv4f32, 2/*#Ops*/, 0, 1,
111795 /*249580*/ /*SwitchType*/ 18, MVT::nxv4f32,// ->249600
111801 MVT::nxv4f32, 3/*#Ops*/, 2, 1, 4,
gen/lib/Target/AArch64/AArch64GenFastISel.inc 6240 if (RetVT.SimpleTy != MVT::nxv4f32)
6268 case MVT::nxv4f32: return fastEmit_ISD_FADD_MVT_nxv4f32_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 5187 /* 39 */ MVT::nxv16i8, MVT::nxv8i16, MVT::nxv4i32, MVT::nxv2i64, MVT::nxv2f16, MVT::nxv4f16, MVT::nxv8f16, MVT::nxv1f32, MVT::nxv2f32, MVT::nxv4f32, MVT::nxv1f64, MVT::nxv2f64, MVT::Other,
include/llvm/Support/MachineValueType.h 533 case nxv4f32:
630 case nxv4f32:
767 case nxv4f32:
1050 if (NumElements == 4) return MVT::nxv4f32;
lib/CodeGen/ValueTypes.cpp 248 case MVT::nxv4f32: return "nxv4f32";
427 case MVT::nxv4f32:
lib/Target/AArch64/AArch64ISelLowering.cpp 183 addRegisterClass(MVT::nxv4f32, &AArch64::ZPRRegClass);
utils/TableGen/CodeGenTarget.cpp 186 case MVT::nxv4f32: return "MVT::nxv4f32";