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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenCallingConv.inc 159 LocVT == MVT::nxv2f64) {
180 LocVT == MVT::nxv2f64) {
1169 LocVT == MVT::nxv2f64) {
gen/lib/Target/AArch64/AArch64GenDAGISel.inc82398 /*191519*/ OPC_CheckChild3Type, MVT::nxv2f64,
101591 /*227705*/ /*SwitchType*/ 5, MVT::nxv2f64,// ->227712
101624 /*227752*/ /*SwitchType*/ 5, MVT::nxv2f64,// ->227759
101657 /*227799*/ /*SwitchType*/ 5, MVT::nxv2f64,// ->227806
101690 /*227846*/ /*SwitchType*/ 5, MVT::nxv2f64,// ->227853
101723 /*227893*/ /*SwitchType*/ 5, MVT::nxv2f64,// ->227900
101730 /*227902*/ OPC_CheckChild0Type, MVT::nxv2f64,
101789 /*227987*/ /*SwitchType*/ 5, MVT::nxv2f64,// ->227994
104793 /*234625*/ /*SwitchType*/ 10, MVT::nxv2f64,// ->234637
104796 MVT::nxv2f64, 2/*#Ops*/, 0, 1,
111713 /*249408*/ /*SwitchType*/ 18, MVT::nxv2f64,// ->249428
111719 MVT::nxv2f64, 3/*#Ops*/, 2, 1, 4,
gen/lib/Target/AArch64/AArch64GenFastISel.inc 6249 if (RetVT.SimpleTy != MVT::nxv2f64)
6269 case MVT::nxv2f64: return fastEmit_ISD_FADD_MVT_nxv2f64_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 5187 /* 39 */ MVT::nxv16i8, MVT::nxv8i16, MVT::nxv4i32, MVT::nxv2i64, MVT::nxv2f16, MVT::nxv4f16, MVT::nxv8f16, MVT::nxv1f32, MVT::nxv2f32, MVT::nxv4f32, MVT::nxv1f64, MVT::nxv2f64, MVT::Other,
include/llvm/Support/MachineValueType.h 541 case nxv2f64:
651 case nxv2f64: return 2;
768 case nxv2f64: return 128;
1056 if (NumElements == 2) return MVT::nxv2f64;
lib/CodeGen/ValueTypes.cpp 252 case MVT::nxv2f64: return "nxv2f64";
435 case MVT::nxv2f64:
lib/Target/AArch64/AArch64ISelLowering.cpp 185 addRegisterClass(MVT::nxv2f64, &AArch64::ZPRRegClass);
utils/TableGen/CodeGenTarget.cpp 190 case MVT::nxv2f64: return "MVT::nxv2f64";