reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenCallingConv.inc

  156       LocVT == MVT::nxv2f32 ||
  177       LocVT == MVT::nxv2f32 ||
 1166       LocVT == MVT::nxv2f32 ||

gen/lib/Target/AArch64/AArch64GenDAGISel.inc

111704 /*249388*/        /*SwitchType*/ 18, MVT::nxv2f32,// ->249408
111710                         MVT::nxv2f32, 3/*#Ops*/, 2, 1, 4,

gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc

 5187   /* 39 */ MVT::nxv16i8, MVT::nxv8i16, MVT::nxv4i32, MVT::nxv2i64, MVT::nxv2f16, MVT::nxv4f16, MVT::nxv8f16, MVT::nxv1f32, MVT::nxv2f32, MVT::nxv4f32, MVT::nxv1f64, MVT::nxv2f64, MVT::Other,

include/llvm/Support/MachineValueType.h

  532       case nxv2f32:
  650       case nxv2f32:
  745       case nxv2f32:
 1049           if (NumElements == 2)  return MVT::nxv2f32;

lib/CodeGen/ValueTypes.cpp

  247   case MVT::nxv2f32: return "nxv2f32";
  425   case MVT::nxv2f32:

lib/Target/AArch64/AArch64ISelLowering.cpp

  182     addRegisterClass(MVT::nxv2f32, &AArch64::ZPRRegClass);

utils/TableGen/CodeGenTarget.cpp

  185   case MVT::nxv2f32:  return "MVT::nxv2f32";