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References

include/llvm/CodeGen/BasicTTIImpl.h
  933     unsigned VecTyLTSize = VecTyLT.getStoreSize();
include/llvm/Support/MachineValueType.h
  839       return getStoreSize() * 8;
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 4571                             Flags, MemVT.getStoreSize(), Alignment,
 4622                             MemVT.getStoreSize(), Alignment, AAMDNodes(),
 9710                               ArgNo, PartBase+i*RegisterVT.getStoreSize());
lib/Target/AArch64/AArch64FastISel.cpp
 3143           MachineMemOperand::MOStore, ArgVT.getStoreSize(), Alignment);
lib/Target/AMDGPU/SIISelLowering.cpp
 1516   unsigned ArgSize = VA.getValVT().getStoreSize();
 2828           Flags.getByValSize() : VA.getValVT().getStoreSize();
lib/Target/ARC/ARCISelLowering.cpp
  502       unsigned ObjSize = VA.getLocVT().getStoreSize();
  641     unsigned ObjSize = VA.getLocVT().getStoreSize();
lib/Target/ARM/ARMCallLowering.cpp
  135         MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(),
lib/Target/AVR/AVRISelLowering.cpp
  906       Offset += In[i].VT.getStoreSize();
lib/Target/Mips/MipsFastISel.cpp
 1269           MachineMemOperand::MOStore, ArgVT.getStoreSize(), Alignment);
lib/Target/Mips/MipsISelLowering.cpp
 2840     unsigned Offset = State.AllocateStack(ValVT.getStoreSize(), OrigAlign);
lib/Target/PowerPC/PPCISelLowering.cpp
 3556       unsigned ArgSize = VA.getLocVT().getStoreSize();
 3558       unsigned ObjSize = VA.getValVT().getStoreSize();
 6762     const unsigned StoreSize = LocVT.getStoreSize();
10672   const int64_t LabelOffset = 1 * PVT.getStoreSize();
10673   const int64_t TOCOffset   = 3 * PVT.getStoreSize();
10674   const int64_t BPOffset    = 4 * PVT.getStoreSize();
10778   const int64_t LabelOffset = 1 * PVT.getStoreSize();
10779   const int64_t SPOffset    = 2 * PVT.getStoreSize();
10780   const int64_t TOCOffset   = 3 * PVT.getStoreSize();
10781   const int64_t BPOffset    = 4 * PVT.getStoreSize();
lib/Target/PowerPC/PPCTargetTransformInfo.cpp
  865   unsigned SrcBytes = LT.second.getStoreSize();
  878       Alignment >= LT.second.getScalarType().getStoreSize())
lib/Target/X86/X86CallLowering.cpp
  153         MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(),
lib/Target/X86/X86FastISel.cpp
 3422           MachineMemOperand::MOStore, ArgVT.getStoreSize(), Alignment);
lib/Target/X86/X86ISelLowering.cpp
21811   unsigned ScalarSize = StoreSVT.getStoreSize();
30452   const int64_t SSPOffset = 3 * PVT.getStoreSize();
30533   const int64_t LabelOffset = 1 * PVT.getStoreSize();
30712   const int64_t SPPOffset = 3 * PVT.getStoreSize();
30826   const int64_t LabelOffset = 1 * PVT.getStoreSize();
30827   const int64_t SPOffset = 2 * PVT.getStoreSize();
lib/Target/X86/X86TargetTransformInfo.cpp
  962       unsigned LegalVTSize = LegalVT.getStoreSize();
 2445   if (LT.second.getStoreSize() == 32 && ST->isUnalignedMem32Slow())
 3518   unsigned LegalVTSize = LegalVT.getStoreSize();
 3618   unsigned LegalVTSize = LegalVT.getStoreSize();