|
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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenCallingConv.inc 474 if (LocVT == MVT::f80) {
889 if (LocVT == MVT::f80) {
986 if (LocVT == MVT::f80 ||
1606 if (LocVT == MVT::f80 ||
1961 if (LocVT == MVT::f80) {
2058 if (LocVT == MVT::f80 ||
2206 if (LocVT == MVT::f80) {
2424 if (LocVT == MVT::f80) {
2521 if (LocVT == MVT::f80 ||
2831 if (LocVT == MVT::f80) {
3112 if (LocVT == MVT::f80) {
3688 if (LocVT == MVT::f80) {
3888 if (LocVT == MVT::f80) {
gen/lib/Target/X86/X86GenDAGISel.inc 6330 /* 13580*/ OPC_CheckChild1Type, MVT::f80,
10662 /* 22823*/ OPC_CheckChild0Type, MVT::f80,
33548 /* 69733*/ /*SwitchType*/ 14, MVT::f80,// ->69749
33552 MVT::f80, MVT::i16, 2/*#Ops*/, 0, 1,
33573 /* 69787*/ /*SwitchType*/ 14, MVT::f80,// ->69803
33577 MVT::f80, MVT::i16, 2/*#Ops*/, 0, 1,
33598 /* 69841*/ /*SwitchType*/ 14, MVT::f80,// ->69857
33602 MVT::f80, MVT::i16, 2/*#Ops*/, 0, 1,
33623 /* 69895*/ /*SwitchType*/ 14, MVT::f80,// ->69911
33627 MVT::f80, MVT::i16, 2/*#Ops*/, 0, 1,
33648 /* 69949*/ /*SwitchType*/ 14, MVT::f80,// ->69965
33652 MVT::f80, MVT::i16, 2/*#Ops*/, 0, 1,
33673 /* 70003*/ /*SwitchType*/ 14, MVT::f80,// ->70019
33677 MVT::f80, MVT::i16, 2/*#Ops*/, 0, 1,
33698 /* 70057*/ /*SwitchType*/ 14, MVT::f80,// ->70073
33702 MVT::f80, MVT::i16, 2/*#Ops*/, 0, 1,
33723 /* 70111*/ /*SwitchType*/ 14, MVT::f80,// ->70127
33727 MVT::f80, MVT::i16, 2/*#Ops*/, 0, 1,
33783 /* 70236*/ /*SwitchType*/ 12, MVT::f80,// ->70250
33786 MVT::f80, 3/*#Ops*/, 0, 1, 2,
50562 /*106742*/ OPC_CheckChild1Type, MVT::f80,
50653 /*106944*/ OPC_CheckChild1Type, MVT::f80,
50686 /*107014*/ OPC_CheckChild1Type, MVT::f80,
51060 /*107913*/ /*SwitchType*/ 16, MVT::f80,// ->107931
51064 MVT::f80, MVT::i16, 5/*#Ops*/, 2, 3, 4, 5, 6,
51079 /*107958*/ /*SwitchType*/ 40, MVT::f80,// ->108000
51085 MVT::f80, MVT::i16, 5/*#Ops*/, 2, 3, 4, 5, 6,
51093 MVT::f80, MVT::i16, 5/*#Ops*/, 2, 3, 4, 5, 6,
55026 /*116633*/ OPC_CheckChild0Type, MVT::f80,
62018 /*130972*/ /*SwitchType*/ 17, MVT::f80,// ->130991
62022 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
62029 /*130996*/ OPC_CheckType, MVT::f80,
62033 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
62090 /*131130*/ OPC_CheckType, MVT::f80,
62094 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
62100 /*131153*/ OPC_CheckType, MVT::f80,
62104 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
62152 /*131269*/ /*SwitchType*/ 17, MVT::f80,// ->131288
62156 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
62164 /*131294*/ OPC_CheckType, MVT::f80,
62168 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
62230 /*131433*/ OPC_CheckType, MVT::f80,
62234 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
62241 /*131457*/ OPC_CheckType, MVT::f80,
62245 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
62434 /*131863*/ /*SwitchType*/ 9, MVT::f80,// ->131874
62436 MVT::f80, MVT::i16, 2/*#Ops*/, 0, 1,
62946 /*132985*/ /*SwitchType*/ 17, MVT::f80,// ->133004
62950 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
62957 /*133009*/ OPC_CheckType, MVT::f80,
62961 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
63018 /*133143*/ OPC_CheckType, MVT::f80,
63022 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
63028 /*133166*/ OPC_CheckType, MVT::f80,
63032 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
63080 /*133282*/ /*SwitchType*/ 17, MVT::f80,// ->133301
63084 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
63092 /*133307*/ OPC_CheckType, MVT::f80,
63096 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
63158 /*133446*/ OPC_CheckType, MVT::f80,
63162 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
63169 /*133470*/ OPC_CheckType, MVT::f80,
63173 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
63297 /*133735*/ /*SwitchType*/ 9, MVT::f80,// ->133746
63299 MVT::f80, MVT::i16, 2/*#Ops*/, 0, 1,
63616 /*134426*/ /*SwitchType*/ 17, MVT::f80,// ->134445
63620 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
63627 /*134450*/ OPC_CheckType, MVT::f80,
63631 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
63688 /*134584*/ OPC_CheckType, MVT::f80,
63692 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
63698 /*134607*/ OPC_CheckType, MVT::f80,
63702 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
63750 /*134723*/ /*SwitchType*/ 17, MVT::f80,// ->134742
63754 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
63762 /*134748*/ OPC_CheckType, MVT::f80,
63766 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
63828 /*134887*/ OPC_CheckType, MVT::f80,
63832 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
63839 /*134911*/ OPC_CheckType, MVT::f80,
63843 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
64032 /*135317*/ /*SwitchType*/ 9, MVT::f80,// ->135328
64034 MVT::f80, MVT::i16, 2/*#Ops*/, 0, 1,
64544 /*136439*/ /*SwitchType*/ 17, MVT::f80,// ->136458
64548 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
64555 /*136463*/ OPC_CheckType, MVT::f80,
64559 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
64616 /*136597*/ OPC_CheckType, MVT::f80,
64620 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
64626 /*136620*/ OPC_CheckType, MVT::f80,
64630 MVT::f80, MVT::i16, 6/*#Ops*/, 0, 3, 4, 5, 6, 7,
64678 /*136736*/ /*SwitchType*/ 17, MVT::f80,// ->136755
64682 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
64690 /*136761*/ OPC_CheckType, MVT::f80,
64694 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
64756 /*136900*/ OPC_CheckType, MVT::f80,
64760 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
64767 /*136924*/ OPC_CheckType, MVT::f80,
64771 MVT::f80, MVT::i16, 6/*#Ops*/, 2, 3, 4, 5, 6, 7,
64895 /*137189*/ /*SwitchType*/ 9, MVT::f80,// ->137200
64897 MVT::f80, MVT::i16, 2/*#Ops*/, 0, 1,
71074 /*149929*/ OPC_CheckChild0Type, MVT::f80,
71248 /*150284*/ /*SwitchType*/ 34, MVT::f80,// ->150320
71254 MVT::f80, 2/*#Ops*/, 0, 1,
71262 MVT::f80, 2/*#Ops*/, 0, 1,
73477 /*155059*/ /*SwitchType*/ 8, MVT::f80,// ->155069
73479 MVT::f80, MVT::i16, 1/*#Ops*/, 0,
74997 /*158184*/ /*SwitchType*/ 59, MVT::f80,// ->158245
75003 MVT::f80, MVT::i16, 5/*#Ops*/, 2, 3, 4, 5, 6,
75011 MVT::f80, MVT::i16, 5/*#Ops*/, 2, 3, 4, 5, 6,
75019 MVT::f80, MVT::i16, 5/*#Ops*/, 2, 3, 4, 5, 6,
75044 /*158293*/ /*SwitchType*/ 18, MVT::f80,// ->158313
75049 MVT::f80, MVT::i16, 5/*#Ops*/, 2, 3, 4, 5, 6,
75065 /*158341*/ /*SwitchType*/ 16, MVT::f80,// ->158359
75069 MVT::f80, MVT::i16, 5/*#Ops*/, 2, 3, 4, 5, 6,
75378 /*159020*/ /*SwitchType*/ 58, MVT::f80,// ->159080
75382 MVT::f80, MVT::i16, 0/*#Ops*/,
75388 MVT::f80, MVT::i16, 0/*#Ops*/,
75394 MVT::f80, MVT::i16, 0/*#Ops*/, // Results = #0 #1
75396 MVT::f80, MVT::i16, 1/*#Ops*/, 0,
75402 MVT::f80, MVT::i16, 0/*#Ops*/, // Results = #0 #1
75404 MVT::f80, MVT::i16, 1/*#Ops*/, 0,
75438 /*159134*/ /*SwitchType*/ 8, MVT::f80,// ->159144
75440 MVT::f80, MVT::i16, 1/*#Ops*/, 0,
75458 /*159174*/ /*SwitchType*/ 8, MVT::f80,// ->159184
75460 MVT::f80, MVT::i16, 1/*#Ops*/, 0,
75478 /*159214*/ /*SwitchType*/ 8, MVT::f80,// ->159224
75480 MVT::f80, MVT::i16, 1/*#Ops*/, 0,
75498 /*159254*/ /*SwitchType*/ 8, MVT::f80,// ->159264
75500 MVT::f80, MVT::i16, 1/*#Ops*/, 0,
254203 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::f80;
gen/lib/Target/X86/X86GenFastISel.inc 863 if (RetVT.SimpleTy != MVT::f80)
872 case MVT::f80: return fastEmit_ISD_FABS_MVT_f80_r(RetVT, Op0, Op0IsKill);
898 if (RetVT.SimpleTy != MVT::f80)
907 case MVT::f80: return fastEmit_ISD_FCOS_MVT_f80_r(RetVT, Op0, Op0IsKill);
933 if (RetVT.SimpleTy != MVT::f80)
942 case MVT::f80: return fastEmit_ISD_FNEG_MVT_f80_r(RetVT, Op0, Op0IsKill);
1192 if (RetVT.SimpleTy != MVT::f80)
1201 case MVT::f80: return fastEmit_ISD_FSIN_MVT_f80_r(RetVT, Op0, Op0IsKill);
1233 if (RetVT.SimpleTy != MVT::f80)
1314 case MVT::f80: return fastEmit_ISD_FSQRT_MVT_f80_r(RetVT, Op0, Op0IsKill);
6462 if (RetVT.SimpleTy != MVT::f80)
6543 case MVT::f80: return fastEmit_ISD_FADD_MVT_f80_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
6593 if (RetVT.SimpleTy != MVT::f80)
6674 case MVT::f80: return fastEmit_ISD_FDIV_MVT_f80_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
6724 if (RetVT.SimpleTy != MVT::f80)
6805 case MVT::f80: return fastEmit_ISD_FMUL_MVT_f80_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
6855 if (RetVT.SimpleTy != MVT::f80)
6936 case MVT::f80: return fastEmit_ISD_FSUB_MVT_f80_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
9536 case MVT::f80: return fastEmit_X86ISD_CMP_MVT_f80_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/X86/X86GenRegisterInfo.inc 4476 /* 8 */ MVT::f80, MVT::f64, MVT::f32, MVT::Other,
4478 /* 14 */ MVT::f80, MVT::Other,
include/llvm/CodeGen/SelectionDAG.h 1386 case MVT::f80: return APFloat::x87DoubleExtended();
include/llvm/Support/MachineValueType.h 747 case f80 : return 80;
873 return MVT::f80;
lib/CodeGen/SelectionDAG/DAGCombiner.cpp13028 if (N0.getOperand(0).getValueType() == MVT::f80 && VT == MVT::f16)
16066 case MVT::f80:
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 2131 case MVT::f80: LC = Call_F80; break;
2172 case MVT::f80: LC = Call_F80; break;
2253 case MVT::f80: LC = RTLIB::SINCOS_F80; break;
2287 case MVT::f80: LC = RTLIB::SINCOS_F80; break;
3148 if ((SVT == MVT::f64 || SVT == MVT::f80) &&
lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp 38 VT == MVT::f80 ? Call_F80 :
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 2595 else if (VT == MVT::f80)
2623 else if (VT == MVT::f80)
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 1345 else if (EltVT == MVT::f80 || EltVT == MVT::f128 || EltVT == MVT::ppcf128 ||
lib/CodeGen/TargetLoweringBase.cpp 229 } else if (OpVT == MVT::f80) {
245 if (OpVT == MVT::f80)
254 if (OpVT == MVT::f80)
261 if (OpVT == MVT::f80)
267 } else if (RetVT == MVT::f80) {
292 } else if (OpVT == MVT::f80) {
334 } else if (OpVT == MVT::f80) {
367 if (RetVT == MVT::f80)
378 if (RetVT == MVT::f80)
389 if (RetVT == MVT::f80)
407 if (RetVT == MVT::f80)
418 if (RetVT == MVT::f80)
429 if (RetVT == MVT::f80)
761 setOperationAction(ISD::ConstantFP, MVT::f80, Expand);
lib/CodeGen/ValueTypes.cpp 132 case MVT::f80: return "f80";
279 case MVT::f80: return Type::getX86_FP80Ty(Context);
460 case Type::X86_FP80TyID: return MVT(MVT::f80);
lib/Target/AArch64/AArch64ISelLowering.cpp 226 setOperationAction(ISD::FREM, MVT::f80, Expand);
541 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f80, Expand);
549 setTruncStoreAction(MVT::f128, MVT::f80, Expand);
lib/Target/SystemZ/SystemZISelLowering.cpp 580 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f80, Expand);
lib/Target/X86/X86FastISel.cpp 305 if (VT == MVT::f80)
364 case MVT::f80:
496 case MVT::f80: // No f80 support yet.
3568 CopyVT = MVT::f80;
3765 case MVT::f80:
3913 case MVT::f80:
lib/Target/X86/X86ISelLowering.cpp 200 setCondCodeAction(ISD::SETOEQ, MVT::f80, Expand);
203 setCondCodeAction(ISD::SETUNE, MVT::f80, Expand);
320 for (auto VT : { MVT::f32, MVT::f64, MVT::f80, MVT::f128,
333 setOperationAction(ISD::FREM , MVT::f80 , Expand);
380 setOperationAction(ISD::FP16_TO_FP, MVT::f80, Expand);
383 setOperationAction(ISD::FP_TO_FP16, MVT::f80, Expand);
388 setLoadExtAction(ISD::EXTLOAD, MVT::f80, MVT::f16, Expand);
392 setTruncStoreAction(MVT::f80, MVT::f16, Expand);
415 for (auto VT : { MVT::f32, MVT::f64, MVT::f80, MVT::f128 }) {
629 addRegisterClass(MVT::f80, &X86::RFP80RegClass);
630 setOperationAction(ISD::UNDEF, MVT::f80, Expand);
631 setOperationAction(ISD::FCOPYSIGN, MVT::f80, Expand);
648 setOperationAction(ISD::FSIN , MVT::f80, Expand);
649 setOperationAction(ISD::FCOS , MVT::f80, Expand);
650 setOperationAction(ISD::FSINCOS, MVT::f80, Expand);
652 setOperationAction(ISD::FFLOOR, MVT::f80, Expand);
653 setOperationAction(ISD::FCEIL, MVT::f80, Expand);
654 setOperationAction(ISD::FTRUNC, MVT::f80, Expand);
655 setOperationAction(ISD::FRINT, MVT::f80, Expand);
656 setOperationAction(ISD::FNEARBYINT, MVT::f80, Expand);
657 setOperationAction(ISD::FMA, MVT::f80, Expand);
658 setOperationAction(ISD::LROUND, MVT::f80, Expand);
659 setOperationAction(ISD::LLROUND, MVT::f80, Expand);
660 setOperationAction(ISD::LRINT, MVT::f80, Expand);
661 setOperationAction(ISD::LLRINT, MVT::f80, Expand);
698 if (isTypeLegal(MVT::f80)) {
699 setOperationAction(ISD::FP_ROUND, MVT::f80, Custom);
700 setOperationAction(ISD::STRICT_FP_ROUND, MVT::f80, Custom);
707 setLoadExtAction(ISD::EXTLOAD, MVT::f128, MVT::f80, Expand);
710 setTruncStoreAction(MVT::f128, MVT::f80, Expand);
716 setOperationAction(ISD::FPOW , MVT::f80 , Expand);
719 setOperationAction(ISD::FLOG, MVT::f80, Expand);
720 setOperationAction(ISD::FLOG2, MVT::f80, Expand);
721 setOperationAction(ISD::FLOG10, MVT::f80, Expand);
722 setOperationAction(ISD::FEXP, MVT::f80, Expand);
723 setOperationAction(ISD::FEXP2, MVT::f80, Expand);
724 setOperationAction(ISD::FMINNUM, MVT::f80, Expand);
725 setOperationAction(ISD::FMAXNUM, MVT::f80, Expand);
2546 ValToCopy = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f80, ValToCopy);
2866 CopyVT = MVT::f80;
3246 else if (RegVT == MVT::f80)
4955 return !IsSigned && FpVT == MVT::f80 && Subtarget.hasCMov();
18862 SDVTList Tys = DAG.getVTList(MVT::f80, MVT::Other);
18887 ISD::EXTLOAD, dl, MVT::f80, DAG.getEntryNode(), FudgePtr,
18892 SDValue Add = DAG.getNode(ISD::FADD, dl, MVT::f80, Fild, Fudge);
18912 if (TheVT != MVT::f32 && TheVT != MVT::f64 && TheVT != MVT::f80) {
18969 else if (TheVT == MVT::f80)
22356 if (ArgVT == MVT::f80) {
28385 SDVTList Tys = DAG.getVTList(MVT::f80, MVT::Other, MVT::Glue);
36836 VT != MVT::f80 && VT != MVT::f128 &&
37594 if (FalseOp.getValueType() != MVT::f80 || hasFPCMov(CC)) {
43272 if (Subtarget.hasDQI() && VT != MVT::f80)
lib/Target/X86/X86ISelLowering.h 1101 return !X86ScalarSSEf64 || VT == MVT::f80;
utils/TableGen/CodeGenTarget.cpp 74 case MVT::f80: return "MVT::f80";